產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 36 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 220 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 0.25 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 1 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 26 2nd harmonic (dBc) 128 3rd harmonic (dBc) 137 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 30 Input bias current (max) (pA) 210000 Features Shutdown CMRR (typ) (dB) 116 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 36 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 220 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 0.25 Rail-to-rail Out Vos (offset voltage at 25°C) (max) (mV) 1 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 26 2nd harmonic (dBc) 128 3rd harmonic (dBc) 137 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 30 Input bias current (max) (pA) 210000 Features Shutdown CMRR (typ) (dB) 116 Rating Catalog
WQFN (RUN) 10 4 mm² (2 mm × 2 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm) SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Ultra Low Power:
    • Voltage: 2.5 V to 5.5 V
    • Current: 250 µA
    • Power-Down Mode: 0.5 µA (typical)
  • Fully-Differential Architecture
  • Bandwidth: 36 MHz
  • Slew Rate: 200 V/µs
  • THD: –120 dBc at 1 kHz (1 VRMS, RL= 2 kΩ)
  • Input Voltage Noise: 10 nV/√Hz (f = 1 kHz)
  • High DC Accuracy:
    • VOS Drift: ±4 µV/˚C (–40°C to +125°C)
    • AOL: 114 dB
  • Rail-to-Rail Output (RRO)
  • Negative Rail Input (NRI)
  • Output Common-Mode Control
  • Ultra Low Power:
    • Voltage: 2.5 V to 5.5 V
    • Current: 250 µA
    • Power-Down Mode: 0.5 µA (typical)
  • Fully-Differential Architecture
  • Bandwidth: 36 MHz
  • Slew Rate: 200 V/µs
  • THD: –120 dBc at 1 kHz (1 VRMS, RL= 2 kΩ)
  • Input Voltage Noise: 10 nV/√Hz (f = 1 kHz)
  • High DC Accuracy:
    • VOS Drift: ±4 µV/˚C (–40°C to +125°C)
    • AOL: 114 dB
  • Rail-to-Rail Output (RRO)
  • Negative Rail Input (NRI)
  • Output Common-Mode Control

The THS4531 is a low-power, fully-differential op amp with input common-mode range below the negative rail and rail-to-rail output. The device is designed for low-power data acquisition systems and high density applications where power consumption and dissipation is critical.

The device features accurate output common-mode control that allows for dc coupling when driving analog-to-digital converters (ADCs). This control, coupled with the input common-mode range below the negative rail and rail-to-rail output, allows for easy interface from single-ended ground-referenced signal sources to successive-approximation registers (SARs), and delta-sigma (ΔΣ) ADCs using only single-supply 2.5 V to 5 V power. The THS4531 is also a valuable tool for general-purpose, low-power differential signal conditioning applications.

The THS4531 is characterized for operation over the extended industrial temperature range from –40°C to +125°C. The following package options are available:

The THS4531 is a low-power, fully-differential op amp with input common-mode range below the negative rail and rail-to-rail output. The device is designed for low-power data acquisition systems and high density applications where power consumption and dissipation is critical.

The device features accurate output common-mode control that allows for dc coupling when driving analog-to-digital converters (ADCs). This control, coupled with the input common-mode range below the negative rail and rail-to-rail output, allows for easy interface from single-ended ground-referenced signal sources to successive-approximation registers (SARs), and delta-sigma (ΔΣ) ADCs using only single-supply 2.5 V to 5 V power. The THS4531 is also a valuable tool for general-purpose, low-power differential signal conditioning applications.

The THS4531 is characterized for operation over the extended industrial temperature range from –40°C to +125°C. The following package options are available:

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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier datasheet (Rev. C) PDF | HTML 2020/3/4
Application brief Why Use an FDA to Drive an ADC? PDF | HTML 2026/1/8
Application brief Active Filter Design for Differential ADCs (Rev. A) PDF | HTML 2025/10/8
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28
應用說明 Fully-Differential Amplifiers (Rev. E) 2016/9/19
技術文章 Designing an EMC-compliant interface to motor position encoders – Part 5 PDF | HTML 2015/11/10
類比設計期刊 Using fully differential op amps as attenuators, Part 3 2009/10/4
類比設計期刊 Using fully differential op amps as attenuators, Part 2 2009/7/14
類比設計期刊 Using fully differential op amps as attenuators, Part 1 2009/5/1
類比設計期刊 Analysis of fully differential amplifiers 2005/3/11
類比設計期刊 Designing for low distortion with high-speed op amps 2005/3/2
應用說明 Noise Analysis for High Speed Op Amps (Rev. A) 2005/1/17

設計與開發

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開發板

THS4531DGKEVM — 採用 DGK 封裝的 THS4531 評估模組

The THS4531DGKEVM is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal source, and test instruments through the use of on-board connectors. The default amplifier configuration is single-ended input, (...)

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THS4531 PSpice Model

SLOM263.ZIP (111 KB) - PSpice 模型
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THS4531 TINA-TI Reference Design

SLOM262.TSC (3751 KB) - TINA-TI 參考設計
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THS4531 TINA-TI Spice Model

SLOM261.ZIP (7 KB) - TINA-TI Spice 模型
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SBOR022 — TI FDA Calculator

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RUN) 10 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian

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