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TAC5112 現行 具有 105dB 動態範圍 ADC 與 114dB 動態範圍 DAC 的低功耗立體聲道音訊轉碼器 10-dB better ADC SNR, 6-dB better DAC SNR, software controlled, low-power and dual TDM, I2S, smaller 4mm x 4mm package

產品詳細資料

Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R, TDM Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Notch filter, Phase-locked loop (PLL), Stereo headphone amplifier Sampling rate (max) (kHz) 96 Rating Catalog ADC SNR (typ) (dB) 92 DAC SNR (typ) (dB) 102 Operating temperature range (°C) -40 to 85
Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R, TDM Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Notch filter, Phase-locked loop (PLL), Stereo headphone amplifier Sampling rate (max) (kHz) 96 Rating Catalog ADC SNR (typ) (dB) 92 DAC SNR (typ) (dB) 102 Operating temperature range (°C) -40 to 85
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Stereo Audio DAC
    • 102-dBA Signal-to-Noise Ratio
    • 16/20/24/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
    • Flexible Power Saving Modes and Performance
      are Available
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
    • Digital Signal Processing and Noise Filtering
      Available During Record
  • Six Audio Input Pins
    • Six Stereo Single-Ended Inputs
  • Six Audio Output Drivers
    • Stereo Fully Differential or Single-Ended
      Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo 48-kHz Playback With
    3.3-V Analog Supply
  • Ultralow-Power Mode with Passive Analog Bypass
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S,
    Left/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V.
    • Digital Core: 1.525 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
  • Package: 5-mm × 5-mm 32-Pin VQFN
  • Stereo Audio DAC
    • 102-dBA Signal-to-Noise Ratio
    • 16/20/24/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
    • Flexible Power Saving Modes and Performance
      are Available
  • Stereo Audio ADC
    • 92-dBA Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
    • Digital Signal Processing and Noise Filtering
      Available During Record
  • Six Audio Input Pins
    • Six Stereo Single-Ended Inputs
  • Six Audio Output Drivers
    • Stereo Fully Differential or Single-Ended
      Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo 48-kHz Playback With
    3.3-V Analog Supply
  • Ultralow-Power Mode with Passive Analog Bypass
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S,
    Left/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V.
    • Digital Core: 1.525 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
  • Package: 5-mm × 5-mm 32-Pin VQFN

The TLV320AIC3105 is a low-power stereo audio codec with multiple single-ended inputs and a stereo headphone amplifier. The output stages are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.

The record path of the TLV320AIC3105 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur during optical zooming in digital cameras. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC3105 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone inputs. The TLV320AIC3105 provides an extremely high range of programmability for both attack (8–1,408 ms) and for decay (0.05–22.4 seconds). This extended AGC range allows the AGC to be tuned for many types of applications.

For battery saving applications where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of the device is powered down during this passthrough operation.

The serial control bus supports the I2C protocol, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320AIC3105 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.525 V–1.95 V, and a digital I/O supply of 1.1 V–3.6 V. The device is available in a 5-mm × 5-mm 32-pin QFN package.

The TLV320AIC3105 is a low-power stereo audio codec with multiple single-ended inputs and a stereo headphone amplifier. The output stages are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.

The record path of the TLV320AIC3105 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur during optical zooming in digital cameras. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC3105 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16-Ω headphones using ac-coupling capacitors, or stereo 16-Ω headphones in a capacitorless output configuration.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level microphone inputs. The TLV320AIC3105 provides an extremely high range of programmability for both attack (8–1,408 ms) and for decay (0.05–22.4 seconds). This extended AGC range allows the AGC to be tuned for many types of applications.

For battery saving applications where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of the device is powered down during this passthrough operation.

The serial control bus supports the I2C protocol, while the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320AIC3105 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.525 V–1.95 V, and a digital I/O supply of 1.1 V–3.6 V. The device is available in a 5-mm × 5-mm 32-pin QFN package.

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設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV320AIC3105EVM-K — TLV320AIC3105 評估模組和 USB 主機板

TLV320AIC3105EVM-K 由 EVM 和 PDK 兩個電路板組成,可搭配個人電腦使用。TLV320AIC3105EVM 是採用德州儀器模組化 EVM 外型尺寸製造的 EVM。此評估模組 (EVM) 是一款完整的立體聲音訊編解碼器,具備多種輸入和輸出、廣泛的音訊路由、混音及音效功能。模組化外型尺寸可直接評估 TLV320AIC3105 裝置,亦即低功率立體聲音訊編解碼器。模組化 EVM 還與德州儀器的 5-6KINTERFACE 和 HPA-MCUINTERFACE 電路板相容,也可和支援 TI 模組化 EVM 系統的第三方電路板相容。

使用指南: PDF
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驅動程式或資料庫

TLV320AIC31XX-DRIVERS — TLV320AIC31xx CODEC 系列 Linux 驅動程序支持

這些 Linux 驅動程式支援我們 TLV320AIC31xx 裝置系列中的低功率音訊轉碼器,並包含 .c 和 .h 檔案。您可以使用下方的「前往第三方廠商」按鈕從 git.kernal.org 下載適當的驅動程式。

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在 Linux 主線路中可用:是
可透過 git.ti.com 取得:不適用

Linux 裝置樹狀文檔

修復和代碼增強功能

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1.將增補程序發送到相關的 Linux (...)

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模擬型號

TLV320AIC3105 IBIS Model

SLAM174.ZIP (75 KB) - IBIS 模型
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計算工具

COEFFICIENT-CALC — Coefficient Calculator For Digital Biquad Filters

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計算工具

SLAR163 — Audio CODEC/ADC PLL Calculator

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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