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AC/DC 控制器

UC1856-SP

現行

航太級 QMLV、40-V 輸入、1.5-A 雙輸出、1-MHz 控制器

立即訂購
產品規格表

UC1856-SP

現行
產品規格表 立即訂購

產品詳細資料

Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start, Synchronization pin Duty cycle (max) (%) 50
Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start, Synchronization pin Duty cycle (max) (%) 50
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CFP (HKT) 16 72.136 mm² 10.16 x 7.1
  • Pin-for-Pin Compatible With the UC1846
  • 65-ns Typical Delay From Shutdown to Outputs,
    and 50-ns Typical Delay From SYNC to Outputs
  • Improved Current-Sense Amplifier With
    Reduced Noise Sensitivity
  • Differential Current Sense with 3-V Common-Mode Range
  • Trimmed-Oscillator Discharge Current for Accurate
    Deadband Control
  • Accurate 1-V Shutdown Threshold
  • High-Current Dual Totem-Pole Outputs (1.5-A peak)
  • TTL Compatible Oscillator SYNC Pin Thresholds
  • 4-kV ESD Protection
  • Pin-for-Pin Compatible With the UC1846
  • 65-ns Typical Delay From Shutdown to Outputs,
    and 50-ns Typical Delay From SYNC to Outputs
  • Improved Current-Sense Amplifier With
    Reduced Noise Sensitivity
  • Differential Current Sense with 3-V Common-Mode Range
  • Trimmed-Oscillator Discharge Current for Accurate
    Deadband Control
  • Accurate 1-V Shutdown Threshold
  • High-Current Dual Totem-Pole Outputs (1.5-A peak)
  • TTL Compatible Oscillator SYNC Pin Thresholds
  • 4-kV ESD Protection

The UC1856 is a high-performance version of the popular UC1846 series of current-mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input-to-output delays have been minimized, and the current sense output is slew-rate limited to reduce noise sensitivity. Fast 1.5-A peak output stages have been added to allow rapid switching of power FETs.

A low-impedance TTL-compatible sync output has been implemented with a TRI-STATE function when used as a sync input.

Internal-chip grounding has been improved to minimize internal noise caused when driving large capacitive loads. This improvement, in conjunction with the improved differential current-sense amplifier, results in enhanced noise immunity.

Other features include a trimmed oscillator current (8%) for accurate frequency and dead-time control; a 1-V 5% shutdown threshold; and 4-kV minimum electrostatic discharge (ESD) protection on all pins.

The UC1856 is a high-performance version of the popular UC1846 series of current-mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input-to-output delays have been minimized, and the current sense output is slew-rate limited to reduce noise sensitivity. Fast 1.5-A peak output stages have been added to allow rapid switching of power FETs.

A low-impedance TTL-compatible sync output has been implemented with a TRI-STATE function when used as a sync input.

Internal-chip grounding has been improved to minimize internal noise caused when driving large capacitive loads. This improvement, in conjunction with the improved differential current-sense amplifier, results in enhanced noise immunity.

Other features include a trimmed oscillator current (8%) for accurate frequency and dead-time control; a 1-V 5% shutdown threshold; and 4-kV minimum electrostatic discharge (ESD) protection on all pins.
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Limited design support from TI available

Existing projects using this product have limited design support from TI. If available, you will find relevant collateral, tools and software on this page. Existing designs using this product have limited design support from TI. Request limited design support in the TI E2E™ support forums.

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重要文件 類型 標題 格式選項 日期
* Data sheet UC1856-SP Improved Current Mode PWM Controller datasheet 2014年 4月 24日
* SMD UC1856-SP SMD 5962-94530 2016年 7月 8日
Selection guide TI Space Products (Rev. L) 2026年 3月 27日
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form (Rev. A) PDF | HTML 2025年 11月 5日
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 2025年 6月 17日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 2025年 6月 10日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025年 2月 20日
Application note QML flow, its importance, and obtaining lot information (Rev. C) 2023年 8月 30日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
Application brief Controlling Input Power for Present and Next-Generation Power Controllers PDF | HTML 2020年 12月 14日
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 2020年 8月 21日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日

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CDIP (J) 16 Ultra Librarian
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