首頁 電源管理 閘極驅動器 隔離式閘極驅動器

UCC21550-Q1

現行

具有 IGBT 專用 DIS 和 DT 針腳的車用 4A/6A、5-kVRMS 雙通道隔離式閘極驅動器

產品詳細資料

Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 5000 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 7070 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, High CMTI, Programmable dead time Output VCC/VDD (min) (V) 13 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8, 12 TI functional safety category Functional Safety-Capable
Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 5000 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 7070 Peak output current (A) 6 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Disable, High CMTI, Programmable dead time Output VCC/VDD (min) (V) 13 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8, 12 TI functional safety category Functional Safety-Capable
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWK) 14 106.09 mm² 10.3 x 10.3
  • Universal: dual low-side, dual high-side or halfbridge driver

  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
  • Junction temperature range –40 to +150°C
  • Up to 4A peak source and 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 5V,8V,12V VDD UVLO options
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing
  • Universal: dual low-side, dual high-side or halfbridge driver

  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
  • Junction temperature range –40 to +150°C
  • Up to 4A peak source and 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 5V,8V,12V VDD UVLO options
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing

The UCC21550-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, SiC, GaN, and IGBT transistors.

The UCC21550-Q1 can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5ns. All supplies have UVLO protection.

With all these advanced features, the UCC21550-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21550-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, SiC, GaN, and IGBT transistors.

The UCC21550-Q1 can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5ns. All supplies have UVLO protection.

With all these advanced features, the UCC21550-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 3
類型 標題 日期
* Data sheet UCC21550x-Q1 Automotive 4A, 6A, Reinforced Isolation Dual-Channel Gate Driver datasheet (Rev. D) PDF | HTML 2024年 8月 9日
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. Z) 2026年 1月 8日
Certificate CQC Certificate for UCC21551xx 2024年 8月 27日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

UCC21520EVM-286 — UCC21520 4A/6A 隔離式雙通道閘極驅動器評估模組

UCC21520EVM-286 專為評估 UCC21520DW 而設計,這是一款具備 4 A 源極和 6-A 汲極峰值電流能力的隔離式雙通道閘極驅動器。此 EVM 可做為驅動功率 MOSFETS、IGBTS 和 SiC MOSFETS 的參考設計,並提供 UCC21520 針腳功能識別、元件選擇指南與 PCB 配置範例。

使用指南: PDF | HTML
TI.com 無法提供
模擬型號

UCC21550B-Q1 PSpice Model

SLUM881.ZIP (157 KB) - PSpice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 16 Ultra Librarian
SOIC (DWK) 14 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片