Radar

Radar system integrated circuits and reference designs

Description

Our integrated circuits and reference designs help you design radar systems with the performance, power and size needed in the L, S, C and X bands. Our high-speed signal chains provide the foundation to build systems that maximize both signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR).

Radar systems often require:

Direct radio frequency (RF) sampling to achieve high bandwidth and dynamic range in L, S and C bands.
High levels of integration and low power for X band system size requirements.
Synchronized, ultra-low phase noise clocks for element level, phased-array applications.
Low-noise power supply for sensitive RF components.

Electronic warfare

Technical documentation

Application notes & user guides

Application Notes (4)

Title	Type	Size (KB)	Date
Keystone Error Detection and Correction EDC ECC (Rev. A)	PDF	439 KB	25 Jun 2021
Powering Sensitive Noise ADC Designs with the TPS62913 Low-Noise Buck Converter	PDF	2.75 MB	30 Sep 2020
Common Design Challenges and Proper Use of Fully Differential Amplifiers (FDA)	PDF	309 KB	25 May 2016
Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs	PDF	621 KB	07 Dec 2015

User Guides (2)

Title	Type	Size (KB)	Date
JESD204B Start Up: Configuration Requirements and Debug	pdf	410 KB	26 Oct 2012
Understanding JESD204B Subclasses and Deterministic Latency	pdf	470 KB	26 Oct 2012

Product bulletin & white papers

White Papers (2)

Title	Type	Size (MB)	Date
Multicore SoCs stay a step ahead of SoC FPGAs	PDF	1.04 MB	23 Feb 2016
Ready to make the jump to JESD204B? White Paper (Rev. B)	PDF	3.33 MB	19 Mar 2015

Technical articles

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