ADC08DJ3200EVM

ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module

ADC08DJ3200EVM

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Overview

The ADC08DJ3200 evaluation module (EVM) allows for the evaluation of the ADC08DJ3200 device. ADC08DJ3200 is a low-power, 8-bit, dual-channel 3.2-GSPS or single-channel 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input, integrated digital down converter with programmable numerically-controlled oscillator (NCO) and decimation settings, which features a JESD204B interface.

The ADC08JD3200EVM has transformer-coupled analog inputs to accommodate a wide range of signal sources and frequencies. An LMX2582 clock synthesizer and LMK04828 JESD204B clock generator are included on the EVM and can be configured to provide an ultra-low-jitter ADC device clock and SYSREF for a complete JESD204B subclass 1 clocking solution.

The ADC08DJ3200EVM connects directly to TSW14J57EVM data capture hardware via the high-speed FMC+ connector. High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW) is also available for data capture and analysis support when using the TSW14J57EVM.

Features
  • Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
  • Easy-to-use software GUI to configure ADC08DJ3200, LMX2582, and LMK04828 devices for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW)
  • Simple connection to TSW14J57EVM data capture card

  • ADC08DJ3200 EVM
  • Mini-USB cable (2m)

High-speed ADCs (>10MSPS)
ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (ADC)

 

Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

 

RF PLLs & synthesizers
LMX2582 5.5-GHz high performance, wideband PLLatinum RF synthesizer

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Evaluation board

ADC08DJ3200EVM – ADC08DJ3200 8-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling ADC Evaluation Module

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Design files

ADC08DJ3200EVM Design File SLVC716.ZIP (8104 KB)

Technical documentation

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Type Title Date
* User guide ADCxxDJxx00 Evaluation Module User's Guide (Rev. A) Jan. 09, 2018
Data sheet ADC08DJ3200 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel, 8-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) Feb. 21, 2019
Certificate ADC08DJ3200EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
More literature Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware Aug. 30, 2017
More literature Arria10 + ADC12DJ3200 JMODE0 Design Firmware May 25, 2017

Related design resources

Hardware development

EVALUATION BOARD
TSW14J56EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps TSW14J57EVM Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

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