ADC12DJ3200EVM

ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

ADC12DJ3200EVM

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Overview

The ADC12DJ3200 evaluation module (EVM) allows for the evaluation of device ADC12DJ3200. The ADC12DJ3200 is a low-power, 12-bit, dual 3.2-GSPS/single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input, integrated digital down converter with programmable NCO and decimation settings (including undecimated 12- and 8-bit ADC output), which features a JESD204B interface. The EVM has transformer-coupled analog inputs to accommodate a wide range of signal sources and frequencies. An LMX2582 clock synthesizer and LMK04828 JESD204B clock generator are included on the EVM and can be configured to provide an ultra-low-jitter ADC device clock and SYSREF for a complete JESD204B subclass 1 clocking solution.

ADC12DJ3200, LMX2582, and LMK04828 are controlled through an easy-to-use software GUI enabling quick configuration for a variety of uses.

The ADC12DJ3200EVM connects directly to TSW14J57EVM data capture hardware via the high-speed FMC+ connector.  High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW) is also available for data capture and analysis support when using the TSW14J57EVM.

  • Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
  • Easy-to-use software GUI to configure ADC12DJ3200, LMX2582, and LMK04828 devices for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW)
  • Simple connection to TSW14J57EVM data capture card

  • ADC12DJ3200 EVM
  • Power cable
  • USB cable
  • FMC+ to FMC adapter

Clock jitter cleaners & synchronizers
LMK04828 Ultra-low jitter synthesizer & jitter cleaner

 

High-speed ADCs (>10MSPS)
ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) ADC12DJ3200QML-SP 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) - aerospace

 

RF PLLs & synthesizers
LMX2582 High Performance, Wideband PLLatinum RF Synthesizer
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Evaluation board

ADC12DJ3200EVM – ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

Evaluation board

ADC12DJ3200EVM-BDL – ADC12DJ3200EVM + TSW14J57EVM data capture/pattern generator bundle

Support software

ADC12DJ3200EVM MATLAB Automation Software – SLVC696.ZIP (5345KB)

GUI for evaluation module (EVM)

ADC12DJxx00 GUI (Rev. A) – SLAC745A.ZIP (177821KB)

Firmware

Arria10 + ADC12DJ3200 JMODE0 Design Firmware – SLAC748.ZIP (9527KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

ADC12DJ3200EVM Design File (Rev. A) SLVC697A.ZIP (4935 KB)

Technical documentation

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Type Title Date
* User guide ADCxxDJxx00 Evaluation Module User's Guide (Rev. A) Jan. 09, 2018
Datasheet ADC12DJ3200 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) Feb. 21, 2019
More literature ADC12DJ3200EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
More literature Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware Aug. 30, 2017
Technical articles Preparing for 5G applications: sync your multichannel JESD204B data acquisition systems up to 15 GHz Aug. 28, 2017
Technical articles High-speed data converter clocking for JESD204B Jul. 07, 2017
More literature Arria10 + ADC12DJ3200 JMODE0 Design Firmware May 25, 2017

Related design resources

Hardware development

EVALUATION BOARD
TSW14J56EVMData capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps
TSW14J57EVMData capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps
INTERFACE ADAPTER
TSW14J10EVMData Converter Evaluation Module to FPGA Platform FMC Adapter: 10 JESD204B Lanes up to 12.5Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SWHigh-speed data converter pro software

Support & training

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