ADC12DJ3200EVM

ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

ADC12DJ3200EVM

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Overview

The ADC12DJ3200 evaluation module (EVM) allows for the evaluation of device ADC12DJ3200. The ADC12DJ3200 is a low-power, 12-bit, dual 3.2-GSPS/single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) with a buffered analog input, integrated digital down converter with programmable NCO and decimation settings (including undecimated 12- and 8-bit ADC output), which features a JESD204B interface. The EVM has transformer-coupled analog inputs to accommodate a wide range of signal sources and frequencies. An LMX2582 clock synthesizer and LMK04828 JESD204B clock generator are included on the EVM and can be configured to provide an ultra-low-jitter ADC device clock and SYSREF for a complete JESD204B subclass 1 clocking solution.

ADC12DJ3200, LMX2582, and LMK04828 are controlled through an easy-to-use software GUI enabling quick configuration for a variety of uses.

The ADC12DJ3200EVM connects directly to TSW14J57EVM data capture hardware via the high-speed FMC+ connector.  High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW) is also available for data capture and analysis support when using the TSW14J57EVM.

Features
  • Flexible transformer-coupled analog input to allow for a variety of sources and frequencies
  • Easy-to-use software GUI to configure ADC12DJ3200, LMX2582, and LMK04828 devices for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High-Speed Data Converter Pro Software (DATACONVERTERPRO-SW)
  • Simple connection to TSW14J57EVM data capture card

  • ADC12DJ3200 EVM
  • Power cable
  • USB cable
  • FMC+ to FMC adapter

Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

 

High-speed ADCs (≥10 MSPS)
ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (ADC) ADC12DJ3200QML-SP Radiation-hardness-assured (RHA), QMLV, 300-krad, 12-bit, dual 3.2-GSPS or single 6.4-GSPS ADC

 

RF PLLs & synthesizers
LMX2582 5.5-GHz high performance, wideband PLLatinum RF synthesizer

Get started

  1. Order the evaluation board - ADC12DJ3200EVM
  2. Order (if needed) the FPGA capture card - TSW14J57EVM
  3. Read the evaluation board user's guide
  4. Make sure you have or buy the necessary power supplies for both boards
  5. Download and install the GUI for the evaluation board
  6. Download and install HSDCPro software for the TSW14J57EVM capture card

Order & start development

Evaluation board

ADC12DJ3200EVM — ADC12DJ3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling ADC evaluation module

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Support software

ADC12DJ3200EVM MATLAB Automation Software — SLVC696.ZIP (5345KB)

GUI for evaluation module (EVM)

ADC12DJxx00 GUI (Rev. A) — SLAC745A.ZIP (177821KB)

lock = Requires export approval (1 minute)
Firmware

Arria10 + ADC12DJ3200 JMODE0 Design Firmware — SLAC748.ZIP (9527KB)

lock = Requires export approval (1 minute)
Firmware

Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware — SLVC698.ZIP (67948KB)

lock = Requires export approval (1 minute)
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

Technical documentation

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Type Title Date
* EVM User's guide ADCxxDJxx00 Evaluation Module User's Guide (Rev. A) 09 Jan 2018
Data sheet ADC12DJ3200 6.4-GSPS Single-Channel or 3.2-GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) PDF | HTML 21 Feb 2019
Certificate ADC12DJ3200EVM EU Declaration of Conformity (DoC) 02 Jan 2019
More literature Xilinx KCU105 + ADC12DJ3200 JMODE0/JMODE2 Design Firmware 30 Aug 2017
Technical article Preparing for 5G applications: sync your multichannel JESD204B data acquisition systems up to 15 GHz 28 Aug 2017
Technical article High-speed data converter clocking for JESD204B 07 Jul 2017
More literature Arria10 + ADC12DJ3200 JMODE0 Design Firmware 25 May 2017

Related design resources

Hardware development

EVALUATION BOARD
TSW14J57EVM Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps
INTERFACE ADAPTER
TSW14J10EVM Data Converter Evaluation Module to FPGA Platform FMC Adapter: 10 JESD204B Lanes up to 12.5Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

Support & training

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