Two-Wire Interface to a HIPERFACE DSL® Encoder Reference Design


Design files


The TIDA-00177 reference design is an EMC compliant industrial interface to a two-wire HIPERFACE DSL® encoder. Applications include industrial servo drives.

The design features a 3.3-V supply RS485 transceiver and line termination and coupling for encoder power over RS485 as per HIPERFACE DSL specification. The design has been tested up to 100m cable length with an integrated cable, where the encoder’s two-wire twisted pair was integrated in the same motor cable.  The encoder connector output is protected against over-voltage and short circuit to prevent damage to an encoder or during a cable short. The design features an industrial compliant 24-V input with wide range from 18-36V. A 3.3V I/O connector with logic signals for easy interface to a host processor with HIPERFACE DSL Master IP Core is made available.

  • Two-Wire Interface to a HIPERFACE DSL Encoder. Supports HIPERFACE DSL 9.375 MBaud Transfer Rate with Power Over RS485, Cable Length up to 100m
  • 3.3-V Supply Half-Duplex RS485 Transceiver with 12kV IEC-ESD and 4kV EFT
  • Wide Input (18-36V) Non-Isolated Power Supply with Configurable Output Voltage 7V-12V, Default 10.5V, 250mA (3.5A peak) Compliant to HIPERFACE DSL Specification 
  • OV, UV and Precise Over-Current Limit with Short-Circuit Protection Leveraging TI eFuse Technology with Fault Indicator
  • Logic Interface (3.3V I/O) to Host Processor like Sitara for the HIPERFACE DSL Master
  • Designed to meet EMC Immunity for ESD, Fast Transient Burst, and Surge with Levels according to IEC61800-3
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUA76A.PDF (15250 K)

Reference design overview and verified performance test data


Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers


Detailed overview of design layout for component placement

TIDRFN3.ZIP (3188 K)

Files used for 3D models or 2D drawings of IC components

TIDCAK3.ZIP (1094 K)

Design file that contains information on physical board layer of design PCB

TIDRFN2.PDF (2541 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

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Power modules (integrated inductor)

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RS-485 & RS-422 transceivers

SN65HVD783.3 V Half-Duplex RS-485, with IEC ESD, 50 Mbps

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eFuses & hot swap controllers

TPS247502.5-V to 18-V, 3mΩ, 0.01-12A eFuse with driver for external blocking FET and latch off

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Technical documentation

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Type Title Date
* Design guide Two-Wire Interface to a HIPERFACE DSL Encoder Design Guide (Rev. A) Sep. 01, 2015
Technical article Designing an EMC-compliant interface to motor position encoders – Part 6 PDF | HTML Nov. 20, 2015
Technical article Design an EMC-compliant interface to motor position encoders – Part 4 PDF | HTML Sep. 28, 2015

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