TIDEP-01020

Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data bandwidth and power efficiency. The DRA829V and TDA4VM processors in our Jacinto™ 7 processor family provides necessary performance, power and automotive interfaces needed for these architectures.

This automotive reference design can enable domain-based architectures while showcasing the performance capabilities of DRA829V and TDAV4M SoCs. This 8-layer PCB design is optimized to reduce cost and time-to-market, making it a great way to evaluate Jacinto 7 processors with a fully functional domain controller board while enabling automotive connectivity interfaces including Ethernet, CAN-FD and PCIe.

Note: This DRA829/TDA4VM SoCs 8-layer reference design is tailored towards customers focused on cost, power and size optimization rather than full entitlement of features; the design focuses only on a subset of the capabilities of the DRA829/TDA4VM SoCs. For superset features, please refer to the DRA829V Jacinto Automotive Processors, Silicon Revision 1.0 data sheet.

For engineers who want to unlock more capabilities of the DRA829V or TDA4VM processors, please note that we also have a 10-layer PCB design for that purpose. Please refer to the 10-layer reference design study "readme" notes for more details.

Features