2K DSI to FPD-Link III bridge serializer with video splitting and HDCP



Product details


Function Serializer Color depth (bpp) 24 Pixel clock frequency (Min) (MHz) 25 Pixel clock frequency (Max) (MHz) 210 Input compatibility MIPI DSI Output compatibility FPD-Link III LVDS Features Support for 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions, Support for Asymmetrical Splitting, Port Aggregation and Switching, Dual-Link Architecture, Virtual Channel Capability, I2C, I2S Signal conditioning DC Balance, Skew Control, LVDS EMI reduction LVDS, SSC Compatible, Data Scrambling, Randomization Diagnostics BIST Throughput (Mbps) 5040 Rating Automotive Operating temperature range (C) -40 to 105 open-in-new Find other Display SerDes

Package | Pins | Size

VQFNP (RTD) 64 81 mm² 9 x 9 open-in-new Find other Display SerDes


  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
  • Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
    • Dual DSI input ports with up to 4 data lanes each
    • Up to 1.5 Gbps per lane
    • Superframe with symmetric and asymmetric unpacking capability
    • ECC and CRC generation
    • Virtual channel capability
  • Single and dual FPD-Link III outputs
    • Single link: up to 105MHz pixel clock
    • Dual link: up to 210MHz pixel clock
  • Symmetric and asymmetric video splitting

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The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50-Ω, single-ended coaxial cables or over 100-Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

The DS90UH941AS-Q1 serializes a MIPI DSI input supporting video resolutions up to 2K, WUXGA and 1080p60 with 24-bit color depth. In backward compatible mode the DS90UH941AS-Q1 supports up to WXGA and 720p resolutions with 24-bit color depth over one differential link.

The DS90UH941AS-Q1 supports HDCP applications that have a HDCP cipher engine in the serializer and deserializer. DSI video data is encrypted before the data is sent to the FPD-Link III interface and decrypted at the deserializer.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet DS90UH941AS-Q1 2K DSI to FPD-Link III Bridge Serializer with Video Splitting and HDCP datasheet May 01, 2019
Technical articles How to choose a power supply for an automotive camera module Sep. 17, 2020
Application notes DS90UB941AS-Q1 DSI Bringup Guide Jul. 31, 2020
Application notes Configuration of DSI Sources for Asymmetric Splitting with DS90UH941AS-Q1 Sep. 27, 2019
User guides DS90UH941AS-Q1EVM User's Guide (Rev. A) May 01, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
The DS90Ux941AS-Q1EVM (evaluation module) converts DSI to FPD-Link III. This kit will demonstrate the functionality and operation of the DS90Ux941AS-Q1. The DS90Ux941AS-Q1 is a DSI to FPD-Link III Serializer which, in conjunction with the DS90Ux940N-1/DS90Ux948-1 Deserializers, takes the data from a (...)
  • AEC-Q100 qualified for automotive applications
  • Supports pixel clock frequency up to 210 MHz for 2K/3K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / display serial interface (DSI) receiver provides a high-bandwidth interface to video processor (...)

Software development

Analog LaunchPad™ software
ALP Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:
  • Local and remote device access
  • Device (...)

Design tools & simulation

SNLM232A.ZIP (113 KB) - IBIS Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
SNLC064.ZIP (52 KB)

Reference designs

Automotive domain controller for gateway, assisted and automated driving systems reference design
TIDEP-01020 Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data bandwidth (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

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VQFN (RTD) 64 View options

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