2K DSI to FPD-Link III bridge serializer with video splitting and HDCP
Product details
Parameters
Package | Pins | Size
Features
- AEC-Q100 qualified for automotive applications with the following results:
- Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
- Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
- MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
- Dual DSI input ports with up to 4 data lanes each
- Up to 1.5 Gbps per lane
- Superframe with symmetric and asymmetric unpacking capability
- ECC and CRC generation
- Virtual channel capability
- Single and dual FPD-Link III outputs
- Single link: up to 105MHz pixel clock
- Dual link: up to 210MHz pixel clock
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Documentation available to aid ISO 26262 system design
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- Symmetric and asymmetric video splitting
- Integrated HDCP v1.4 cipher engine with on-chip key storage
Description
The DS90UH941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UH940N-Q1, DS90UH948-Q1, DS90UH924-Q1, DS90UH926-Q1, or DS90UH928-Q1 deserializer, the DS90UH941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50- Ω, single-ended coaxial cables or over 100- Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UH941AS-Q1 can support symmetric and asymmetric splitting.
The DS90UH941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.
The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.
Technical documentation
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View all 5 | Type | Title | Date | |
|---|---|---|---|
| * | Data sheet | DS90UH941AS-Q1 2K DSI to FPD-Link III Bridge Serializer w/ Video Split and HDCP datasheet (Rev. B) | Feb. 01, 2021 |
| Application note | Splitter Mode Operations With the DS90Ux941ASQ1 (Rev. A) | Oct. 27, 2020 | |
| Technical article | How to choose a power supply for an automotive camera module | Sep. 17, 2020 | |
| Application note | DS90UB941AS-Q1 DSI Bringup Guide | Jul. 31, 2020 | |
| User guide | DS90UH941AS-Q1EVM User's Guide (Rev. A) | May 01, 2019 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
DS90UH941AS-Q1EVM
Description
The DS90Ux941AS-Q1EVM (evaluation module) converts DSI to FPD-Link III. This kit will demonstrate the functionality and operation of the DS90Ux941AS-Q1. The DS90Ux941AS-Q1 is a DSI to FPD-Link III Serializer which, in conjunction with the DS90Ux940N-1/DS90Ux948-1 Deserializers, takes the data from a (...)
Features
- AEC-Q100 qualified for automotive applications
- Supports pixel clock frequency up to 210 MHz for 2K/3K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
- MIPI D-PHY / display serial interface (DSI) receiver provides a high-bandwidth interface to video processor (...)
Software development
ALP — Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:
- Local and remote device access
- Device (...)
Design tools & simulation
SNLM232A.ZIP (113 KB) - IBIS Model
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
SNLC064.ZIP (52 KB)
Reference designs
TIDEP-01020 — Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data bandwidth (...)
Design files
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download TIDEP-01020 Gerber.zip (3545KB) -
download TIDEP-01020 BOM.zip (1026KB) -
download TIDEP-01020 Assembly Drawing.zip (2254KB) -
download TIDEP-01020 PCB.zip (170KB) -
download TIDEP-01020 CAD Files.zip (11471KB)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| VQFN (RTD) | 64 | View options |
Ordering & quality
Information included:
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- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
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