TIDEP0070

DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-based Systems

TIDEP0070

Design files

Overview

This reference design describes system considerations for Dual Data Rate (DDR) memory interface with Error Correcting Code (ECC) support in high-reliability applications, based on the 66AK2Gx Multicore DSP + ARM processor System-on-Chip (SoC).  It enables developers to implement a high reliability based solution rapidly by discussing system interfaces, board hardware, software, throughput performance and diagnostic procedures.

Features
  • Optimized high speed signal routing
  • Surface-mount PCIe x1 socket
  • Example of AC coupling capacitor placement
  • Example of recommended differential pair spacing

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUBJ4A.PDF (2432 K)

Reference design overview and verified performance test data

TIDUBO4B.PDF (1604 K)

Reference design overview and verified performance test data

TIDRLE5A.PDF (1523 K)

Detailed schematic diagram for design layout and components

TIDRLE5.PDF (1530 K)

Detailed schematic diagram for design layout and components

TIDRLE6A.PDF (119 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRLE6.PDF (117 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRLE7A.ZIP (151 K)

Detailed overview of design layout for component placement

TIDRLE7.ZIP (151 K)

Detailed overview of design layout for component placement

TIDRLE8A.ZIP (12389 K)

Files used for 3D models or 2D drawings of IC components

TIDRLE8.ZIP (12389 K)

Files used for 3D models or 2D drawings of IC components

Products

Includes TI products in the design and potential alternatives.

AND gates

SN74LVC1G08Single 2-input, 1.65-V to 5.5-V AND gate

Data sheet document-pdfAcrobat PDF
Arm-based processors

66AK2G12High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core

Data sheet document-pdfAcrobat PDF open-in-new HTML
Clock generators

CDCM62082:8 ultra-low power, low jitter clock generator

Data sheet document-pdfAcrobat PDF open-in-new HTML
Multi-channel ICs (PMICs)

TPS65911Integrated Power Management IC (PMIC) with 4 DC/DCs, 9 LDOs and RTC

Data sheet document-pdfAcrobat PDF open-in-new HTML
Noninverting buffers & drivers

SN74LVC1G07Single 1.65-V to 5.5-V buffer with open-drain outputs

Data sheet document-pdfAcrobat PDF open-in-new HTML

Start development

Hardware

Development kit

EVMK2G – 66AK2Gx (K2G) Evaluation Module

The K2G Evaluation Module (EVM) enables developers to immediately start evaluating the 66AK2Gx - 600MHz processor, and to accelerate the development of audio, industrial motor control, smart grid protection and other high reliability, real-time compute intensive applications.  Similar to (...)

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Technical documentation

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Type Title Date
* Design guide DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-Based Systems (Rev. B) Jun. 12, 2018
Design guide PCI-Express PCB Design Considerations for the K2Gx GP EVM Design Guide (Rev. A) Jun. 12, 2018

Related design resources

Hardware development

DEVELOPMENT KIT
EVMK2GX 66AK2Gx 1GHz evaluation module

Software development

SOFTWARE DEVELOPMENT KIT (SDK)
PROCESSOR-SDK-K2G Processor SDK for 66AK2Gx Processors - Linux and TI-RTOS Support

Support & training

TI E2E™ forums with technical support from TI engineers

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