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TIDEP0070

DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-based Systems

Design files

TIDEP0070

Design files

Overview

This reference design describes system considerations for Dual Data Rate (DDR) memory interface with Error Correcting Code (ECC) support in high-reliability applications, based on the 66AK2Gx Multicore DSP + ARM processor System-on-Chip (SoC).  It enables developers to implement a high reliability based solution rapidly by discussing system interfaces, board hardware, software, throughput performance and diagnostic procedures.

Features
  • Optimized high speed signal routing
  • Surface-mount PCIe x1 socket
  • Example of AC coupling capacitor placement
  • Example of recommended differential pair spacing
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Design files & products

Design files

Download ready-to-use system files to speed your design process.

download Design guide — TIDEP0070
TIDUBO4B.PDF (1604 KB)

Reference design overview and verified performance test data

download Design guide — TIDEP0070
TIDUBJ4A.PDF (2432 KB)

Reference design overview and verified performance test data

download Assembly drawing — TIDEP0070
TIDRLE7A.ZIP (151 KB)

Detailed overview of design layout for component placement

download Bill of materials (BOM) — TIDEP0070
TIDRLE6A.PDF (119 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

download CAD/CAE symbol — TIDEP0070
TIDRLE8A.ZIP (12389 KB)

Files used for 3D models or 2D drawings of IC components

download Schematic — TIDEP0070
TIDRLE5A.PDF (1523 KB)

Detailed schematic diagram for design layout and components

Products

Includes TI products in the design and potential alternatives.

Audio & radar DSP SoCs

66AK2G12 — High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core

Data sheet: PDF | HTML
AND gates

SN74LVC1G08 — 1-ch, 2-input 1.65-V to 5.5-V 32 mA drive strength AND gate

Data sheet: PDF | HTML
Noninverting buffers & drivers

SN74LVC1G07 — Single 1.65-V to 5.5-V buffer with open-drain outputs

Data sheet: PDF | HTML
Multi-channel ICs (PMICs)

TPS65911 — Integrated Power Management IC (PMIC) with 4 DC/DCs, 9 LDOs and RTC

Data sheet: PDF | HTML
Clock generators

CDCM6208 — 2:8 ultra-low power, low jitter clock generator

Data sheet: PDF | HTML

Start development

Hardware development

Development kit

EVMK2GX —

66AK2Gx 1GHz evaluation module

This reference design describes system considerations for Dual Data Rate (DDR) memory interface with Error Correcting Code (ECC) support in high-reliability applications, based on the 66AK2Gx Multicore DSP + ARM processor System-on-Chip (SoC).  It enables developers to implement a high (...)
Supported products & hardware

Supported products & hardware

Hardware development
Reference design
TIDEP0067 — 66AK2Gx DSP + ARM Processor Power Solution Reference Design TIDEP0068 — PCI Express PCB Design Considerations Reference Design for the K2G General Purpose EVM (GP EVM) TIDEP0069 — 66AK2Gx DSP + ARM Processor Audio Processing Reference Design TIDEP0070 — DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-based Systems
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EVMK2GX —

66AK2Gx 1GHz evaluation module

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Hardware development
Reference design
TIDEP0067 — 66AK2Gx DSP + ARM Processor Power Solution Reference Design TIDEP0068 — PCI Express PCB Design Considerations Reference Design for the K2G General Purpose EVM (GP EVM) TIDEP0069 — 66AK2Gx DSP + ARM Processor Audio Processing Reference Design TIDEP0070 — DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-based Systems
TI’s Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Top documentation Type Title Format options Date
* Design guide DDR ECC Reference Design to Improve Memory Reliability in 66AK2Gx-Based Systems (Rev. B) Jun 12, 2018
* Design guide PCI-Express PCB Design Considerations for the K2Gx GP EVM Design Guide (Rev. A) Jun 12, 2018

Related design resources

Software development

SOFTWARE DEVELOPMENT KIT (SDK)
PROCESSOR-SDK-K2G — Processor SDK for 66AK2Gx Processors - Linux and TI-RTOS Support

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