Complete RF-to-bits receiver evaluation platform utilizing a dual-channel downconverter, LMH6521 DVGA, and ADS4249 14-bit 250-MSPS ADC
The LMK04800 clock generator and jitter-cleaning provides a complete onboard clocking solution
A software GUI is provided to configure the ADS4249, LMK04800, and LMH6521
Easily interfaces with the TSW1400 pattern capture and generation card for quick evaluation
The TSW1265EVM is a wideband dual receiver reference design and evaluation platform. The signal chain allows conversion from RF to bits using a dual-channel downconverter mixer, the LMH6521 dual-channel DVGA, and the ADS4249 14-bit 250-MSPS ADC. The TSW1265EVM also includes the LMK04800 dual-PLL clock jitter cleaner and generator to provide an onboard low-noise clocking solution. A software GUI is provided to allow for configuration of the ADS4249 and LMK04800. The gain of the LMH6521 DVGA can be controlled through the GUI or alternatively through the high speed connector with an FPGA. The EVM is designed to mate with the TSW1400EVM pattern capture and generation board to capture data from the ADS4249. Signal analysis can then be performed with the High Speed Data Converter Pro software tool.