TSW1265EVM
Wideband Dual Receiver Reference Design and Evaluation Platform
TSW1265EVM
Overview
The TSW1265EVM is a wideband dual receiver reference design and evaluation platform. The signal chain allows conversion from RF to bits using a dual-channel downconverter mixer, the LMH6521 dual-channel DVGA, and the ADS4249 14-bit 250-MSPS ADC. The TSW1265EVM also includes the LMK04800 dual-PLL clock jitter cleaner and generator to provide an onboard low-noise clocking solution. A software GUI is provided to allow for configuration of the ADS4249 and LMK04800. The gain of the LMH6521 DVGA can be controlled through the GUI or alternatively through the high speed connector with an FPGA. The EVM is designed to mate with the TSW1400EVM pattern capture and generation board to capture data from the ADS4249. Signal analysis can then be performed with the High Speed Data Converter Pro software tool.
High-speed ADCs (>10MSPS)
Clock jitter cleaners & synchronizers
Order & start development
TSW1265EVM – TSW1265 Wideband dual receiver reference design and evaluation platform
TSW1265 GUI Software Installer – SLWC105.ZIP (121403KB)
Design files
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| More literature | TSW1265EVM EU Declaration of Conformity (DoC) | Jan. 02, 2019 | |
| User guide | TSW1265 User's Guide | Mar. 14, 2012 |
Related design resources
Hardware development
EVALUATION BOARD
Support & training
TI E2E™ forums with technical support from TI engineers
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