Product details

Function Cascaded PLLs Number of outputs 14 RMS jitter (fs) 111 Output frequency (min) (MHz) 0.22 Output frequency (max) (MHz) 2600 Input type LVCMOS, LVDS, LVPECL Output type LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.15 Supply voltage (max) (V) 3.45 Features 0 Delay Rating Catalog Operating temperature range (°C) -40 to 85 Number of input channels 2
Function Cascaded PLLs Number of outputs 14 RMS jitter (fs) 111 Output frequency (min) (MHz) 0.22 Output frequency (max) (MHz) 2600 Input type LVCMOS, LVDS, LVPECL Output type LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.15 Supply voltage (max) (V) 3.45 Features 0 Delay Rating Catalog Operating temperature range (°C) -40 to 85 Number of input channels 2
WQFN (NKD) 64 81 mm² 9 x 9
  • Ultra-Low RMS Jitter Performance
    • 111 fs RMS Jitter (12 kHz to 20 MHz)
    • 123 fs RMS Jitter (100 Hz to 20 MHz)
  • Dual Loop PLLatinum™ PLL Architecture
  • PLL1
    • Integrated Low-Noise Crystal Oscillator
      Circuit
    • Holdover Mode when Input Clocks are Lost
    • Automatic or Manual Triggering/Recovery
  • PLL2
    • Normalized PLL Noise Floor of –227 dBc/Hz
    • Phase Detector Rate up to 155 MHz
    • OSCin Frequency-Doubler
    • Integrated Low-Noise VCO
  • 2 Redundant Input Clocks with LOS
    • Automatic and Manual Switch-Over Modes
  • 50 % Duty Cycle Output Divides, 1 to 1045 (Even
    and Odd)
  • 12 LVPECL, LVDS, or LVCMOS Programmable
    Outputs
  • Digital Delay: Fixed or Dynamically Adjustable
  • 25 ps Step Analog Delay Control.
  • 14 Differential Outputs. Up to 26 Single Ended.
    • Up to 6 VCXO/Crystal Buffered Outputs
  • Clock Rates of up to 1536 MHz
  • 0-Delay Mode
  • Three Default Clock Outputs at Power Up
  • Multi-Mode: Dual PLL, Single PLL, and Clock
    Distribution
  • Industrial Temperature Range: –40 to 85°C
  • 3.15-V to 3.45-V Operation
  • 2 Dedicated Buffered/Divided OSCin Clocks
  • Package: 64-Pin WQFN (9.0 × 9.0 × 0.8 mm)
  • Ultra-Low RMS Jitter Performance
    • 111 fs RMS Jitter (12 kHz to 20 MHz)
    • 123 fs RMS Jitter (100 Hz to 20 MHz)
  • Dual Loop PLLatinum™ PLL Architecture
  • PLL1
    • Integrated Low-Noise Crystal Oscillator
      Circuit
    • Holdover Mode when Input Clocks are Lost
    • Automatic or Manual Triggering/Recovery
  • PLL2
    • Normalized PLL Noise Floor of –227 dBc/Hz
    • Phase Detector Rate up to 155 MHz
    • OSCin Frequency-Doubler
    • Integrated Low-Noise VCO
  • 2 Redundant Input Clocks with LOS
    • Automatic and Manual Switch-Over Modes
  • 50 % Duty Cycle Output Divides, 1 to 1045 (Even
    and Odd)
  • 12 LVPECL, LVDS, or LVCMOS Programmable
    Outputs
  • Digital Delay: Fixed or Dynamically Adjustable
  • 25 ps Step Analog Delay Control.
  • 14 Differential Outputs. Up to 26 Single Ended.
    • Up to 6 VCXO/Crystal Buffered Outputs
  • Clock Rates of up to 1536 MHz
  • 0-Delay Mode
  • Three Default Clock Outputs at Power Up
  • Multi-Mode: Dual PLL, Single PLL, and Clock
    Distribution
  • Industrial Temperature Range: –40 to 85°C
  • 3.15-V to 3.45-V Operation
  • 2 Dedicated Buffered/Divided OSCin Clocks
  • Package: 64-Pin WQFN (9.0 × 9.0 × 0.8 mm)

The LMK0480x family is the industry’s highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum architecture is capable of 111 fs rms jitter (12 kHz to 20 MHz) using a low noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides low-noise jitter cleaner functionality while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When paired with a very narrow loop bandwidth, PLL1 uses the superior close-in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

The LMK0480x family is the industry’s highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum architecture is capable of 111 fs rms jitter (12 kHz to 20 MHz) using a low noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides low-noise jitter cleaner functionality while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When paired with a very narrow loop bandwidth, PLL1 uses the superior close-in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

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Technical documentation

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Type Title Date
* Data sheet LMK0480x Low-Noise Clock Jitter Cleaner with Dual Loop PLLs datasheet (Rev. K) PDF | HTML 24 Dec 2014
User guide TSW308x Evaluation Module (Rev. B) 18 May 2016
EVM User's guide TSW4806EVM User's Guide (Rev. A) 26 Apr 2016
EVM User's guide LMK0480x Evaluation Board Instructions (Rev. B) 04 Aug 2014
Design guide TSW1265 Dual-Wideband RF-to-Digital Receiver Design Guide 03 Sep 2013
Design guide TSW308x Wideband Digital to RF Transmit Solution Design Guide 03 Sep 2013
Application note Using the LMK0480x/LMK04906 for Hitless Switching and Holdover 12 Jul 2013
User guide TSW3085EVM ACPR and EVM Measurements (TIDA-00076 Reference Guide) 29 Dec 2011
Design guide Clock Conditioner Owner's Manual 10 Nov 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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Hardware development
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Software programming tool

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The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

Which software do I use?

Product

(...)

Supported products & hardware

Supported products & hardware

Products
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RF PLLs & synthesizers
LMX2430 3.0-GHz/0.8-GHz PLLatinum dual high frequency synthesizer for RF personal communications LMX2433 3.6-GHz/1.7-GHz PLLatinum dual high frequency synthesizer for RF personal communications LMX2434 5.0-GHz/2.5-GHz PLLatinum low power dual frequency synthesizer for RF personal communications LMX2470 2.6-GHz delta-sigma fractional-N PLL with 800-MHz integer-N PLL LMX2485 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485E 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485Q-Q1 500MHz to 3GHz automotive delta-sigma low power dual PLL LMX2486 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2487 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL LMX2487E 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2502 Frequency synthesizer system with integrated VCOs LMX2522 PLLatinum dual frequency synthesizer system with integrated VCOs LMX2531 High performance frequency synthesizer system with integrated VCO LMX2541 Ultra-low noise PLLatinum frequency synthesizer with integrated VCO LMX2581 3.76-GHz wideband frequency synthesizer with integrated VCO
Clock buffers
LMK01000 1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs LMK01010 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVDS outputs LMK01020 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs LMK01801 Dual clock distribution
Clock jitter cleaners
LMK04000 Precision clock conditioners low-noise clock jitter cleaner with cascaded PLLs LMK04001 Low-noise jitter cleaner with 1430 to 1570-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04002 Low-noise jitter cleaner with 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04010 Low-noise jitter cleaner with 1185 to 1296-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04011 Low-noise jitter cleaner with 1430 to 1570-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04031 Low-noise jitter cleaner with 1430 to 1570-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04033 Low-noise jitter cleaner with 1840 to 2160-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04100 Precision clock conditioners clock jitter cleaner with cascaded PLLs LMK04101 Jitter cleaner with integrated 1430 to 1570-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04102 Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04110 Jitter cleaner with integrated 1185 to 1296-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04111 Jitter cleaner with integrated 1430 to 1570-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04131 Jitter cleaner with integrated 1430 to 1570-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04133 Jitter cleaner with integrated 1840 to 2160-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04208 Ultra low-noise clock jitter cleaner with 6 programmable outputs LMK04228 Ultra low-noise clock jitter cleaner with dual loop PLLs LMK04806 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO LMK04808 Low-noise clock jitter cleaner with dual loop PLLs and integrated 2.9-GHz VCO LMK04816 Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04906 Ultra low noise clock jitter cleaner/multiplier with 6 programmable outputs
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Support software

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Supported products & hardware

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Simulation model

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Bill of materials (BOM)

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Design tool

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Supported products & hardware

Supported products & hardware

Products
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LMX1204 12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization LMX1214 1:5 16GHz RF buffer and divider with auxiliary clock LMX1906-SP Radiation-hardness-assured (RHA) 15GHz buffer, multiplier and divider with SYSREF and FPGA clock LMX2430 3.0-GHz/0.8-GHz PLLatinum dual high frequency synthesizer for RF personal communications LMX2433 3.6-GHz/1.7-GHz PLLatinum dual high frequency synthesizer for RF personal communications LMX2434 5.0-GHz/2.5-GHz PLLatinum low power dual frequency synthesizer for RF personal communications LMX2470 2.6-GHz delta-sigma fractional-N PLL with 800-MHz integer-N PLL LMX2485 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485E 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485Q-Q1 500MHz to 3GHz automotive delta-sigma low power dual PLL LMX2486 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2487 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL LMX2487E 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2491 6.4-GHz low noise fractional-N PLL with ramp/chirp generation LMX2492 500MHz to 14GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2492-Q1 Automotive grade 500-MHz to 14-GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2531 High performance frequency synthesizer system with integrated VCO LMX2541 Ultra-low noise PLLatinum frequency synthesizer with integrated VCO LMX2571 1.34-GHz, low-power, extreme-temperature RF synthesizer with frequency-shift keying (FSK) modulation LMX2571-EP Enhanced-product, 1.34-GHz, low-power, extreme-temperature RF synthesizer with FSK modulation LMX2572 6.4-GHz low-power wideband RF synthesizer LMX2572LP 2-GHz low power wideband RF synthesizer with FSK modulation LMX2581 3.76-GHz wideband frequency synthesizer with integrated VCO LMX2581E 3.8-GHz wideband frequency synthesizer with integrated VCO LMX2582 5.5-GHz high performance, wideband PLLatinum RF synthesizer LMX2592 9.8-GHz wideband frequency synthesizer with integrated VCO LMX2594 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support LMX2595 20-GHz wideband RF synthesizer with phase synchronization & JESD204B support LMX2615-SP Space grade 40-MHz to 15-GHz wideband synthesizer with phase synchronization and JESD204B support LMX2694-EP Enhanced product 15-GHz RF synthesizer with phase synchronization TRF3765 300M-4800MHz Low Noise Integer-N/Fractional-N PLL with Integrated VCO and up to 8 Outputs
Clock buffers
CDCDB2000 DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB400 4-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB800 8-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB803 8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses CDCLVC1102 Low jitter, 1:2 LVCMOS fan-out clock buffer CDCLVC1103 Low jitter, 1:3 LVCMOS fan-out clock buffer CDCLVC1104 Low jitter, 1:4 LVCMOS fan-out clock buffer CDCLVC1106 Low jitter, 1:6 LVCMOS fan-out clock buffer CDCLVC1108 Low jitter, 1:8 LVCMOS fan-out clock buffer CDCLVC1110 Low jitter, 1:10 LVCMOS fan-out clock buffer CDCLVC1112 Low jitter, 1:12 LVCMOS fan-out clock buffer CDCLVC1310 Universal input, 10-output low impedance LVCMOS buffer CDCLVD110 1-to-10 LVDS clock buffer up to 900-MHz with minimum skew for clock distribution CDCLVD110A 1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution CDCLVD1204 Low jitter, 2-input selectable 1:4 universal-to-LVDS buffer CDCLVD1208 Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer CDCLVD1212 Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer CDCLVD1213 Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider CDCLVD1216 Low jitter, 2-input selectable 1:16 universal-to-LVDS buffer CDCLVD2102 Low jitter, dual 1:2 universal-to-LVDS buffer CDCLVD2104 Low jitter, dual 1:4 universal-to-LVDS buffer CDCLVD2106 Low jitter, dual 1:6 universal-to-LVDS buffer CDCLVD2108 Low jitter, dual 1:8 universal-to-LVDS buffer CDCLVP110 1:10 LVPECL/HSTL to LVPECL clock driver CDCLVP1102 Low jitter 1:2 universal-to-LVPECL buffer CDCLVP111 1:10 LVPECL buffer with selectable input CDCLVP111-EP HiRel, 1:10 LVPECL buffer with selectable input CDCLVP111-SP 1:10 high speed clock buffer with selectable input clock driver CDCLVP1204 Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer CDCLVP1208 Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer CDCLVP1212 Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer CDCLVP1216 Low jitter, 2-input selectable 1:16 universal-to-LVPECL buffer CDCLVP2102 Low jitter, dual 1:2 universal-to-LVPECL buffer CDCLVP2104 Low jitter, dual 1:4 universal-to-LVPECL buffer CDCLVP2106 Low jitter, dual 1:6 universal-to-LVPECL buffer CDCLVP2108 Low jitter, dual 1:8 universal-to-LVPECL buffer CDCLVP215 Dual 1:5 high speed LVPECL fan out buffer LMK00301 3-GHz, 10-output differential fanout buffer / level translator LMK00304 3.1-GHz differential clock buffer/level translator with 4 configurable outputs LMK00306 3.1-GHz differential clock buffer/level translator with 6 configurable outputs LMK00308 3.1-GHz differential clock buffer/level translator with 8 configurable outputs LMK00334 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00334-Q1 Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00338 8-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK1C1102 2-channel output LVCMOS 1.8-V buffer LMK1C1103 3-channel output LVCMOS 1.8-V buffer LMK1C1104 4-channel output LVCMOS 1.8-V buffer LMK1C1106 6-channel output LVCMOS 1.8-V buffer LMK1C1108 8-channel output LVCMOS 1.8-V buffer LMK1D1204 4-channel output LVDS 1.8-V buffer LMK1D1204P 4-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer with pin control LMK1D1208 8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D1208I 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C LMK1D1208P 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control LMK1D1212 12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D1216 16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2102 Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D2104 Dual bank 4-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2106 Dual bank 6-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2108 Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
Clock generators
LMK03318 Ultra-low jitter clock generator family with single PLL LMK03328 Ultra-low jitter clock generator family with two independent PLLs LMK03806 Ultra-low jitter clock generator with 14 outputs
IQ demodulators
LMX8410L High-Performance Mixer With Integrated Synthesizer
Clock jitter cleaners
LMK04208 Ultra low-noise clock jitter cleaner with 6 programmable outputs LMK04368-EP Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner LMK04714-Q1 Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner LMK04803 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO LMK04805 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.2-GHz VCO LMK04806 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO LMK04808 Low-noise clock jitter cleaner with dual loop PLLs and integrated 2.9-GHz VCO LMK04816 Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0. LMK04828-EP Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c LMK04832 Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop LMK04832-SEP Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner LMK04832-SP Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner LMK04906 Ultra low noise clock jitter cleaner/multiplier with 6 programmable outputs
Clock network synchronizers
LMK05028 Low-jitter dual-channel network synchronizer clock LMK05318 Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B-Q1 Automotive ultra-low jitter network synchronizer and clock generator LMK5B33216 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5B33414 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5C33216 Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW LMK5C33216A Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
Hardware development
Evaluation board
LMK04832EVM LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMX2571EPEVM LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2594PSEVM LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 LMX2595 X-MWblock evaluation modules
Software
Application software & framework
TICSPRO-SW Texas Instruments Clocks and Synthesizers (TICS) Pro Software
IDE, configuration, compiler or debugger
CODELOADER CodeLoader Software for device register programming
Support software
LMX9830-SW LMX9830 Application Notes, Software, and Tools LMX9838-SW LMX9838 Application Notes, Software, and Tools
Download options
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

TIDA-00076 — Adjacent Channel Power Ratio (ACPR) and Error Vector Magnitude (%EVM) Measurements

This reference design discusses the use of the TSW3085EVM with the TSW3100 pattern generator to test adjacent channel power ratio (ACPR) and error vector magnitude (EVM) measurements of LTE baseband signals. By using the TSW3100 LTE GUI, patterns are loaded into the TSW3085EVM which is comprised of (...)
User guide: PDF
Schematic: PDF
Reference designs

TIDA-00072 — Wideband Digital to RF Transmit Solution

The TSW308x is an example design of a wideband digital to RF transmit solution capable of generating 600 MHz of contiguous RF spectrum.  The system provides a reference on how to use the DAC34x8x, TRF3705 IQ modulator and LMK0480x to achieve this.  This reference EVM coupled with a (...)
Design guide: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
WQFN (NKD) 64 Ultra Librarian

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