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2T2R RF-Sampling Transceiver w/ Dual 14-Bit 3GSPS ADC/9GSPS DAC Clocking Solution Evaluation Module TSW40RF80EVM (ACTIVE)
Key Document
- TSW40RF8x Evaluation Module User's Guide (Rev. A)
(PDF 1765 KB)
27 Sep 2017
Description
The TSW40RF80 evaluation module (EVM) is a two-transmit two-receive (2T2R) RF-sampling transceiver reference design. The module contains the DAC38RF80 dual-channel RF-sampling digital-to-analog converter (DAC) and the ADC32RF45 dual-channel RF-sampling analog-to-digital converter (ADC).
The DAC38RF80 sampling rate operates up to 9 GSPS and includes an onboard PLL/VCO for high-frequency clock generation. The output is single ended for easy interface to 50-Ω circuitry. The ADC32RF45 sampling rate operates up to 3 GSPS. It has an option to use a dual digital down converter in each channel or to bypass it to access the full Nyquist bandwidth.
The TSW40RF80EVM includes the LMK04828 clock generator for providing a reference signal to the DAC PLL and for generating the required SYSREF signals needed for the JESD204B protocol. Also included is the LMX2582 RF synthesizer for providing an ultra-low-phase noise clock solution for the ADC.
The TSW40RF80EVM implements an efficient LDO-less power-management solution using only DC-DC converters for the required power rails. The design fits within a standard FMC-compliant width and interfaces with the TI pattern/capture card solution (TSW14J56), as well as many FPGA development kits.
Features
- RF-sampling transceiver utilizing the JESD204B interface
- DAC38RF80 dual RF DAC with single-ended output
- ADC32RF45 dual RF ADC with bypass option
- LDO-less power-management solution
- Onboard clocking solution; four different ADC clocking options, including TX PLL clock output
- Interfaces with TSW14J56 or FPGA development kit with FMC connector
Order Now
| Part Number | Buy from Texas Instruments or Third Party | Buy from Authorized Distributor | Status | |||||||
TSW40RF80EVM: |
Pricing may vary.
|
ACTIVE | ||||||||
| Contact a Distributor | ||||||||||
TI's Standard Terms and Conditions for Evaluation Items apply.
Technical Documents
Datasheet (2)
| Title | Type | Size (KB) | Date |
|---|---|---|---|
| 3726 | 31 Jul 2017 | ||
| 7308 | 06 Dec 2016 |
Application notes (2)
| Title | Type | Size (KB) | Date |
|---|---|---|---|
| 390 | 09 Feb 2018 | ||
| 1374 | 02 Aug 2017 |
User guides (1)
| Title | Type | Size (KB) | Date |
| 1765 | 27 Sep 2017 |
Design files (1)
| Title | Type | Size (KB) | Date |
| ZIP | 9967 | 18 Jul 2017 |
More literature (1)
| Title | Type | Size (KB) | Date |
| 39 | 02 Jan 2019 |
Related Products
Software (1)
-
TSW40RF80EVM GUI Installer (Rev. A)
(ZIP, 18668 KB) 27 Jun 2017
TI Devices (9)
| Part Number | Name | Product Family |
|---|---|---|
| ADC32RF45 | Dual-Channel, 14-Bit, 3-GSPS RF-Sampling Analog-to-Digital Converter (ADC) | Analog-to-digital converters (ADCs) |
| DAC38RF80 | Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL Digital-to-Analog Converter (DAC) | Digital-to-analog converters (DACs) |
| LMK04828 | Ultra-low jitter synthesizer & jitter cleaner | Clock jitter cleaners |
| LMX2582 | High Performance, Wideband PLLatinum RF Synthesizer | Clock & timing |
| LP5907 | 250-mA ultra-low-noise low-IQ low-dropout (LDO) linear regulator | Power management |
| TPS7A47 | 36-V, 1-A, 4.17-μVRMS, RF low-dropout (LDO) voltage regulator | Power management |
| TPS7A85 | High-Current (4A), High-Accuracy (1%), Low-Noise (4.4μVRMS), LDO Voltage Regulator | Power management |
| TPS7A85A | High-Current (4A), High-Accuracy (0.75%), Low-Noise (4.4µVRMS), LDO Voltage Regulator | Power management |
| TPS82085 | 3A, High-Efficiency Step-Down Converter Module with Integrated Inductor | Step-down (buck) |
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