TSW40RF80EVM

2T2R RF-Sampling Transceiver w/ Dual 14-Bit 3GSPS ADC/9GSPS DAC Clocking Solution Evaluation Module

TSW40RF80EVM

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Overview

The TSW40RF80 evaluation module (EVM) is a two-transmit two-receive (2T2R) RF-sampling transceiver reference design. The module contains the DAC38RF80 dual-channel RF-sampling digital-to-analog converter (DAC) and the ADC32RF45 dual-channel RF-sampling analog-to-digital converter (ADC).

The DAC38RF80 sampling rate operates up to 9 GSPS and includes an onboard PLL/VCO for high-frequency clock generation. The output is single ended for easy interface to 50-Ω circuitry. The ADC32RF45 sampling rate operates up to 3 GSPS. It has an option to use a dual digital down converter in each channel or to bypass it to access the full Nyquist bandwidth.

The TSW40RF80EVM includes the LMK04828 clock generator for providing a reference signal to the DAC PLL and for generating the required SYSREF signals needed for the JESD204B protocol. Also included is the LMX2582 RF synthesizer for providing an ultra-low-phase noise clock solution for the ADC.

The TSW40RF80EVM implements an efficient LDO-less power-management solution using only DC-DC converters for the required power rails. The design fits within a standard FMC-compliant width and interfaces with the TI pattern/capture card solution (TSW14J56), as well as many FPGA development kits.

  • RF-sampling transceiver utilizing the JESD204B interface
  • DAC38RF80 dual RF DAC with single-ended output
  • ADC32RF45 dual RF ADC with bypass option
  • LDO-less power-management solution
  • Onboard clocking solution; four different ADC clocking options, including TX PLL clock output
  • Interfaces with TSW14J56 or FPGA development kit with FMC connector

  • USB cable
  • Power cable

Transmitters
DAC38RF80 Dual-Channel, 14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL Digital-to-Analog Converter (DAC)

 

Buck modules (integrated inductor)
TPS82085 3A, High-Efficiency Step-Down Converter Module with Integrated Inductor

 

Clock jitter cleaners & synchronizers
LMK04828 Ultra-low jitter synthesizer & jitter cleaner

 

High-speed ADCs (>10MSPS)
ADC32RF45 Dual-Channel, 14-Bit, 3-GSPS RF-Sampling Analog-to-Digital Converter (ADC)

 

Linear regulators (LDO)
LP5907 250-mA, low-noise, high-PSRR, ultra-low-dropout voltage regulator with low IQ and enable TPS7A47 1-A, 36-V, low-noise, high-PSRR, low-dropout voltage regulator with enable TPS7A85 4-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy TPS7A85A 4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good

 

RF PLLs & synthesizers
LMX2582 High Performance, Wideband PLLatinum RF Synthesizer
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Evaluation board

TSW40RF80EVM – 2T2R RF-Sampling Transceiver w/ Dual 14-Bit 3GSPS ADC/9GSPS DAC Clocking Solution Evaluation Module

GUI for evaluation module (EVM)

TSW40RF80EVM GUI Installer (Rev. A) – SLAC738A.ZIP (18668KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

TSW40RF80EVM Design File SLAC751.ZIP (9967 KB)

Technical documentation

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Type Title Date
* User guide TSW40RF8x Evaluation Module User's Guide (Rev. A) Sep. 27, 2017
More literature TSW40RF80EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
Application note Spurs Analysis in the RF Sampling ADC Feb. 09, 2018
Application note Automated Data Transfer Between TSW40RF8x and TSW14J56 using MATLAB Aug. 02, 2017
Datasheet DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL datasheet (Rev. C) Jul. 31, 2017
Datasheet ADC32RF45 Dual-Channel, 14-Bit, 3.0-GSPS, Analog-to-Digital Converter datasheet (Rev. C) Dec. 06, 2016

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