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TPS7A85A

ACTIVE
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4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good

Data sheet
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4-A, low-VIN (1.1-V), low-noise, high-accuracy, ultra-low-dropout voltage regulator with power good

TPS7A85A

ACTIVE
Data sheet Order now

Product details

Parameters

Output options Adjustable Output, Programmable Output Iout (Max) (A) 4 Vin (Max) (V) 6.5 Vin (Min) (V) 1.1 Vout (Max) (V) 5.1 Vout (Min) (V) 0.8 Noise (uVrms) 4.4 Iq (Typ) (mA) 2.8 Thermal resistance θJA (°C/W) 43 Load capacitance (Min) (µF) 47 Rating Catalog Regulated outputs (#) 1 Features Enable, Foldback Overcurrent Protection, Output Discharge, Power Good, Soft Start Accuracy (%) 0.75 PSRR @ 100 KHz (dB) 25 Dropout voltage (Vdo) (Typ) (mV) 150 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VQFN (RGR) 20 12 mm² 3.5 x 3.5 open-in-new Find other Linear regulators (LDO)

Features

  • Low Dropout: 150 mV (Typical) at 4 A
  • 0.75% (Maximum) Accuracy Over Line, Load, and Temperature With BIAS
  • Output Voltage Noise:
    • 4.4 µVRMS at 0.8-V Output
    • 7.7 µVRMS at 5.1-V Output
  • Input Voltage Range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • ANY-OUT™ Operation:
    • Output Voltage Range: 0.8 V to 3.95 V
  • Adjustable Operation:
    • Output Voltage Range: 0.8 V to 5.1 V
  • Power-Supply Ripple Rejection:
    • 40 dB at 500 kHz
  • Excellent Load Transient Response
  • Adjustable Soft-Start In-Rush Control
  • Open-Drain Power-Good (PG) Output
  • Stable with a 47-µF or Larger Ceramic Output Capacitor
  • θJC = 3.4°C/W
  • 3.5-mm × 3.5-mm, 20-Pin VQFN

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Description

The TPS7A85A is a low-noise (4.4 µVRMS), low dropout linear regulator (LDO) capable of sourcing 4 A with only 240 mV of maximum dropout. The device output voltage is pin-programmable from 0.8 V to 3.95 V and adjustable from 0.8 V to 5.1 V using an external resistor divider.

The combination of low-noise (4.4 µVRMS), high- PSRR, and high output current capability makes the TPS7A85A ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A85A limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and 5.1-V output capability of the device.

For digital loads (such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)) requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over load and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A85A ensure optimal system performance.

The versatility of the TPS7A8500A makes the device a component of choice for many demanding applications.

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Exact equivalent in functionality and parametrics to the compared device:
TPS7A85 ACTIVE 4-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy 4-A LDO regulator with good accuracy (1%) and improved thermal resistance (35.4°C/W).

Technical documentation

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Type Title Date
* Datasheet TPS7A85A 4-A, High-Accuracy (0.75%), Low-Noise (4.4 μVRMS), LDO Regulator datasheet Jun. 06, 2017
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guides Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
Selection guides TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017
User guides TPS7A85EVM-754 Evaluation Module User's Guide Feb. 29, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The DAC38RF80EVM is the circuit board for evaluating DAC38RF80/84/90 digital-to-analog converters (DACs). The EVM can be used to evaluate the performance of the DAC up to 9-GSPS sampling rate. It is designed to work with the FPGA-based pattern generator card TSW14J56EVM (Rev B and up). The available (...)

Features
  • Allows evaluation of DAC38RF80/84/90 up to 9-GSPS sampling rate
  • Supports up to 12.5-Gbps SerDes signaling rate across FMC
  • Two on-chip PLLs with superior phase noise to simplify system clock generation; also supports external clock mode
  • AC-coupled output with 2:1 impedance transformer for (...)
View details
EVALUATION BOARDS Download
document-generic User guide
Description
The DAC38RF87 evaluation module (EVM) is the circuit board for evaluating the DAC38RF87 digital-to-analog converter (DAC). The EVM can be used to evaluate the performance of the DAC up to 9-GSPS sampling rate and is designed to work with the TSW14J56EVM (Rev B and up). The available FMC connector (...)
Features
  • Allows evaluation of DAC38RF87/97 up to 9-GSPS sampling rate
  • Supports up to 12.5-Gbps SerDes signaling rate across FMC
  • Two on-chip PLLs with superior phase noise to simplify system clock generation; also supports external clock mode
  • AC-coupled output with integrated impedance transformer (DAC38RF87) for (...)
View details
EVALUATION BOARDS Download
document-generic User guide
Description

The DAC38RF89 evaluation module (EVM) is the circuit board for evaluating DAC38RF89 digital-to-analog converters (DACs). The DAC38RFEVM can be used to evaluate the performance of the DAC up to 9-GSPS sampling rate and is designed to work with the TSW14J56EVM (Rev B and up). The available FMC (...)

Features
  • Allows evaluation of DAC38RF89 up to 9-GSPS sampling rate
  • Supports up to 12.5-Gbps SerDes signaling rate across FMC
  • Two on-chip PLLs with superior phase noise to simplify system clock generation; also supports external clock mode
  • AC-coupled output with integrated impedance transformer (DAC38RF89) for (...)
View details
EVALUATION BOARDS Download
document-generic User guide
$29.00
Description
The TPS7A85EVM-754 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A85, High-Current 4-A low dropout voltage regulator.  The EVM circuit board is configured to be a reference design for engineering applications requiring current to (...)
Features
  • Low Dropout: 180 mV (max) at 4 A
  • 1% (max) Accuracy Over Line, Load, and Temperature
  • ANY-OUT Output Voltage Range: 0.8 V to 3.95 V
  • Adjustable Output Voltage Range: 0.8 V to 5.0 V
  • High Power-Supply Ripple Rejection: 40 dB at 500 kHz
View details
EVALUATION BOARDS Download
document-generic User guide
$2,499.00
Description

The TSW40RF80 evaluation module (EVM) is a two-transmit two-receive (2T2R) RF-sampling transceiver reference design. The module contains the DAC38RF80 dual-channel RF-sampling digital-to-analog converter (DAC) and the ADC32RF45 dual-channel RF-sampling analog-to-digital converter (ADC).

The DAC38RF80 (...)

Features
  • RF-sampling transceiver utilizing the JESD204B interface
  • DAC38RF80 dual RF DAC with single-ended output
  • ADC32RF45 dual RF ADC with bypass option
  • LDO-less power-management solution
  • Onboard clocking solution; four different ADC clocking options, including TX PLL clock output
  • Interfaces with TSW14J56 or (...)
View details
EVALUATION BOARDS Download
document-generic User guide
$2,499.00
Description

The TSW40RF82 evaluation module (EVM) is a two-transmit two-receive (2T2R) RF-sampling transceiver reference design. The module contains the DAC38RF82 dual-channel RF-sampling digital-to-analog converter (DAC) and the ADC32RF45 dual-channel RF-sampling analog-to-digital converter (ADC).

The DAC38RF82 (...)

Features
  • RF-sampling transceiver utilizing the JESD204B interface
  • DAC38RF82 dual RF DAC with differential output
  • ADC32RF45 dual RF ADC with bypass option
  • LDO-less power-management solution
  • Onboard clocking solution; four different ADC clocking options, including TX PLL clock output
  • Interfaces with TSW14J56 or FPGA (...)
View details

Design tools & simulation

SIMULATION MODELS Download
SBVM572.ZIP (3 KB) - PSpice Model
SIMULATION MODELS Download
SBVM573.ZIP (77 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
Low noise power-supply reference design maximizing performance in 12.8 GSPS data acquisition systems
TIDA-01027 — This reference design demonstrates an efficient, low noise 5-rail power-supply design for very high-speed DAQ systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency synchronized and phase-shifted in order to minimize input current ripple and control frequency content (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High-Current Low-Noise Parallel LDO Reference Design
TIDA-01232 — This parallel low-dropout (LDO) reference design showcases the TPS7A85 low-noise LDO linear regulator in a parallel configuration, which is capable of sourcing 3.5 A per LDO or 7 A per board. Additional design flexibility includes the ability to stack this design to meet the current (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RGR) 20 View options

Ordering & quality

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