SLUSF60 December   2023 BQ77307

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information BQ77307
    5. 6.5  Supply Current
    6. 6.6  Digital I/O
    7. 6.7  REGOUT LDO
    8. 6.8  Voltage References
    9. 6.9  Current Detector
    10. 6.10 Thermistor Pullup Resistor
    11. 6.11 Hardware Overtemperature Detector
    12. 6.12 Internal Oscillator
    13. 6.13 Charge and Discharge FET Drivers
    14. 6.14 Protection Subsystem
    15. 6.15 Timing Requirements - I2C Interface, 100kHz Mode
    16. 6.16 Timing Requirements - I2C Interface, 400kHz Mode
    17. 6.17 Timing Diagram
    18. 6.18 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Configuration
      1. 7.3.1 Commands and Subcommands
      2. 7.3.2 Configuration Using OTP or Registers
      3. 7.3.3 Device Security
    4. 7.4 Device Hardware Features
      1. 7.4.1  Voltage Protection Subsystem
      2. 7.4.2  Current Protection Subsystem
      3. 7.4.3  Unused VC Pins
      4. 7.4.4  Internal Temperature Protection
      5. 7.4.5  Thermistor Temperature Protections
      6. 7.4.6  Protection FET Drivers
      7. 7.4.7  Voltage References
      8. 7.4.8  Multiplexer
      9. 7.4.9  LDOs
      10. 7.4.10 Standalone Versus Host Interface
      11. 7.4.11 ALERT Pin Operation
      12. 7.4.12 Low Frequency Oscillator
      13. 7.4.13 I2C Serial Communications Interface
    5. 7.5 Protection Subsystem
      1. 7.5.1 Protections Overview
      2. 7.5.2 Primary Protections
      3. 7.5.3 Cell Open Wire Protection
      4. 7.5.4 Diagnostic Checks
    6. 7.6 Device Power Modes
      1. 7.6.1 Overview of Power Modes
      2. 7.6.2 NORMAL Mode
      3. 7.6.3 SHUTDOWN Mode
      4. 7.6.4 CONFIG_UPDATE Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Performance Plot
      4. 8.2.4 Random Cell Connection Support
      5. 8.2.5 Startup Timing
      6. 8.2.6 FET Driver Turn-Off
      7. 8.2.7 Usage of Unused Pins
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.3 Unused VC Pins

If the BQ77307 device is used in a system with fewer than 5 series cells, specific cells must be used for connection to real cells, as shown in Table 7-1. The unused cell inputs should be shorted out on the circuit board. The device only implements protections for those cells designated as real cells.

Table 7-1 Cell Usage
NUMBER OF CELL USEDCELL CONNECTIONSSHORTED CONNECTIONS
7VC7‒VC6, VC6‒VC5, VC5‒VC4, VC4‒VC3, VC3‒VC2, VC2‒VC1, VC1‒VC0—
6VC7‒VC6, VC6‒VC5, VC5‒VC4, VC3‒VC2, VC2‒VC1, VC1‒VC0VC4‒VC3
5VC7‒VC6, VC5‒VC4, VC3‒VC2, VC2‒VC1, VC1‒VC0VC6‒VC5, VC4‒VC3
4VC7‒VC6, VC5‒VC4, VC3‒VC2, VC1‒VC0VC6‒VC5, VC4‒VC3, VC2‒VC1
3VC7‒VC6, VC5‒VC4, VC1‒VC0VC6‒VC5, VC4‒VC3, VC3‒VC2, VC2‒VC1
2VC7‒VC6, VC1‒VC0VC6‒VC5, VC5‒VC4,VC4‒VC3, VC3‒VC2, VC2‒VC1

The unused cell input pins should be shorted to adjacent cell input pins, as shown in Figure 8-10 for a 6-series system.

It is also important to note that the range of voltages supported by the different VC pins differs depending on the pin. For example, pins VC5, VC6, and VC7 can only support accurate cell voltage protections if their pin voltage is greater than or equal to 2 V. Thus, if implementing a 2-series system using the top and bottom cell input pins, the upper cell voltage may not be evaluated correctly if the lower cell voltage drops below 2 V, since then VC6 would be below 2 V.


GUID-9206D0E7-8797-4CC3-9F57-339DF98B2014-low.svg

Figure 7-1 Connecting an Unused Cell Input Pin

The device data memory must be configured to specify which cell inputs are used for actual cells. The device uses this information to disable cell voltage protections associated with inputs that are not used. See the BQ77307 Technical Reference Manual for further details.