SCPS241 July   2022 TCAL9539

ADVANCE INFORMATION  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 I2C Bus Timing Requirements
    8. 6.8 Switching Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 Adjustable Output Drive Strength
      3. 8.3.3 Interrupt Output (INT)
      4. 8.3.4 Reset Input (RESET)
      5. 8.3.5 Software Reset Call
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Address
      2. 8.6.2 Control Register and Command Byte
      3. 8.6.3 Register Descriptions
      4. 8.6.4 Bus Transactions
        1. 8.6.4.1 Writes
        2. 8.6.4.2 Reads
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Minimizing ICC When I/Os Control LEDs
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-On Reset Requirements
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RTW|24
  • PW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 PW (TSSOP) Package, 24-Pin
(Top View)
Figure 5-2 RTW (WQFN) Package, 24-Pin
(Top View)
Table 5-1 Pin Functions
PIN DESCRIPTION
NAME TSSOP
(PW)		 WQFN
(RTW)		 TYPE(1)
A0 21 18 I Address input. Connect directly to VCC or ground
A1 2 23 I Address input. Connect directly to VCC or ground
GND 12 9 — Ground
INT 1 22 O Interrupt output. Connect to VCC through a pull-up resistor
RESET 3 24 I Active-low reset input. Connect to VCC through a pull-up resistor if no active connection is used
P00 4 1 I/O P-port input/output (push-pull design structure). At power on, P00 is configured as an input
P01 5 2 I/O P-port input/output (push-pull design structure). At power on, P01 is configured as an input
P02 6 3 I/O P-port input/output (push-pull design structure). At power on, P02 is configured as an input
P03 7 4 I/O P-port input/output (push-pull design structure). At power on, P03 is configured as an input
P04 8 5 I/O P-port input/output (push-pull design structure). At power on, P04 is configured as an input
P05 9 6 I/O P-port input/output (push-pull design structure). At power on, P05 is configured as an input
P06 10 7 I/O P-port input/output (push-pull design structure). At power on, P06 is configured as an input
P07 11 8 I/O P-port input/output (push-pull design structure). At power on, P07 is configured as an input
P10 13 10 I/O P-port input/output (push-pull design structure). At power on, P10 is configured as an input
P11 14 11 I/O P-port input/output (push-pull design structure). At power on, P11 is configured as an input
P12 15 12 I/O P-port input/output (push-pull design structure). At power on, P12 is configured as an input
P13 16 13 I/O P-port input/output (push-pull design structure). At power on, P13 is configured as an input
P14 17 14 I/O P-port input/output (push-pull design structure). At power on, P14 is configured as an input
P15 18 15 I/O P-port input/output (push-pull design structure). At power on, P15 is configured as an input
P16 19 16 I/O P-port input/output (push-pull design structure). At power on, P16 is configured as an input
P17 20 17 I/O P-port input/output (push-pull design structure). At power on, P17 is configured as an input
SCL 22 19 I Serial clock bus. Connect to VCC through a pull-up resistor
SDA 23 20 I/O Serial data bus. Connect to VCC through a pull-up resistor
VCC 24 21 — Supply voltage
(1) I = Input, O = Output, I/O = Input or Output