JAJSKY1B November 2017 – February 2023 DLP550JE
PRODUCTION DATA
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
SUPPLY VOLTAGES | |||||
VCC | Supply voltage for LVCMOS core logic(1) | –0.5 | 4 | V | |
VCCI | Supply voltage for LVDS Interface(1) | –0.5 | 4 | V | |
VOFFSET | Micromirror Electrode and HVCMOS voltage(1)(2) | –0.5 | 9 | V | |
VMBRST | Voltage applied to MBRST[0:15] Input Pins | –28 | 28 | V | |
|VCC – VCCI| | Supply voltage change(3) | 0.3 | V | ||
INPUT VOLTAGES | |||||
Input voltage for all other input pins(1) | –0.5 | VCC + 0.3 | V | ||
|VID| | Input differential voltage (absolute value) (4) | 700 | mV | ||
CLOCKS | |||||
ƒclock | Clock frequency for LVDS interface, DCLK_A | 400 | MHz | ||
ƒclock | Clock frequency for LVDS interface, DCLK_B | 400 | MHz | ||
ENVIRONMENTAL | |||||
TARRAY and TWINDOW | Temperature, operating(5) | 0 | 90 | °C | |
Temperature, non-operating (5) | –40 | 90 | °C | ||
|TDELTA| | Absolute Temperature delta between any point on the window edge and the ceramic test point TP1(6) | 30 | °C | ||
TDP | Dew Point Temperature, operating and non-operating (non-condensing) | 81 | °C |