JAJSDF7A January 2017 – May 2017 LMK61E0M
PRODUCTION DATA.
The NVMDAT register returns the on-chip EEPROM contents from the starting address specified by the MEMADR register.
BIT NO. | FIELD | TYPE | RESET | EEPROM | DESCRIPTION |
---|---|---|---|---|---|
[7:0] | NVMDAT[7:0] | R | 0x00 | N | EEPROM Read Data. The first time an I2C read transaction accesses the NVMDAT register address, either because it was explicitly targeted or because the address was auto-incremented, the read transaction will return the EEPROM data located at the address specified by the MEMADR register. Any additional read's which are part of the same transaction will cause the EEPROM address to be incremented and the next EEPROM data byte will be returned. The I2C address will no longer be auto-incremented, i.e the I2C address will be locked to the NVMDAT register after the first access. Access to the NVMDAT register will terminate at the end of the current I2C transaction. |