SNLA437 December   2023 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83825I , DP83826E , DP83826I

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1DP83822 Application Overview
  5. 2Troubleshooting the PHY Application
    1. 2.1  Schematic and Layout Checklist
    2. 2.2  Verify Successful Power-up of PHY
    3. 2.3  Read and Check Register Values
    4. 2.4  Peripheral Pin Checks
      1. 2.4.1 Probe the RESET_N Signal
      2. 2.4.2 Probe the RBIAS pin
      3. 2.4.3 Probe the Serial Management Interface (MDC, MDIO) Signals
      4. 2.4.4 Probe the MDI Signals
    5. 2.5  Verifying Strap Configurations During Initialization
    6. 2.6  Debugging Link Quality
    7. 2.7  Built-In Self Test With Various Loopback Modes
    8. 2.8  Debug the Fiber Connection
    9. 2.9  Debug the MAC Interface
    10. 2.10 Debug the Start of Frame Detect
    11. 2.11 Tools and References
      1. 2.11.1 DP83822 Register Access
      2. 2.11.2 Extended Register Access
      3. 2.11.3 Software and Driver Debug on Linux
        1. 2.11.3.1 Common Terminal Outputs and Solutions
  6. 3References

2.4.4 Probe the MDI Signals

A link pulse should be visible on the channel transmit and receive differential pair (TD_P, TD_M).

A short Ethernet cable with 100 Ohm terminations can be used for measuring the MDI signals. A terminated cable is shown in Figure 2-4. A connection diagram for making measurements with the terminated cable is shown in Figure 2-5.

GUID-50F93AF4-1E27-4B57-83A0-2C3DF68F2B65-low.gif Figure 2-4 100 Ω Terminated Cable for MDI Signal Measurement
GUID-74588587-DC9F-4F35-B7FC-E94AD26D2D41-low.gif Figure 2-5 Connection Diagram for 100 M Terminated Cable

Link pulses are nominally 100 ns wide and occur every 16 ms. Figure 2-6 shows a correct link pulse.

GUID-20231103-SS0I-0V0H-TGLQ-6XV1DJ9ZW6L7-low.svg Figure 2-6 DP83822 Link Pulse