SNLA437 December   2023 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83825I , DP83826E , DP83826I

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1DP83822 Application Overview
  5. 2Troubleshooting the PHY Application
    1. 2.1  Schematic and Layout Checklist
    2. 2.2  Verify Successful Power-up of PHY
    3. 2.3  Read and Check Register Values
    4. 2.4  Peripheral Pin Checks
      1. 2.4.1 Probe the RESET_N Signal
      2. 2.4.2 Probe the RBIAS pin
      3. 2.4.3 Probe the Serial Management Interface (MDC, MDIO) Signals
      4. 2.4.4 Probe the MDI Signals
    5. 2.5  Verifying Strap Configurations During Initialization
    6. 2.6  Debugging Link Quality
    7. 2.7  Built-In Self Test With Various Loopback Modes
    8. 2.8  Debug the Fiber Connection
    9. 2.9  Debug the MAC Interface
    10. 2.10 Debug the Start of Frame Detect
    11. 2.11 Tools and References
      1. 2.11.1 DP83822 Register Access
      2. 2.11.2 Extended Register Access
      3. 2.11.3 Software and Driver Debug on Linux
        1. 2.11.3.1 Common Terminal Outputs and Solutions
  6. 3References

Abstract

This application note provides a suggested flow for evaluating a new application and confirming the expected functionality. The step-by-step recommendations will help ease board bring up and initial evaluation of DP83822 designs.