Product details

Resolution (bps) 16 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 800 Features High Performance Rating Catalog Interpolation 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1750 SFDR (dB) 83 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (bps) 16 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 800 Features High Performance Rating Catalog Interpolation 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1750 SFDR (dB) 83 Architecture Current Sink Operating temperature range (°C) -40 to 85 Reference type Int
VQFN (RGC) 64 81 mm² 9 x 9
  • Dual, 16-Bit, 800 MSPS DACs
  • Dual, 16-Bit, 250 MSPS CMOS Input Data
    • 16 Sample Input FIFO
    • Flexible Input Data Bus Options
  • High Performance
    • 81 dBc ACLR WCDMA TM1 at 70 MHz
  • Selectable 2x–8x Interpolation Filters
    • Stop-band Attenuation > 80 dB
  • Complex Mixer with 32-Bit NCO
  • Digital Quadrature Modulator Correction
    • Gain, Phase and Offset Correction
  • Digital Inverse SINC Filter
  • 3- or 4-Wire Serial Control Interface
  • On Chip 1.2-V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-pin 9×9mm QFN
  • APPLICATIONS
    • Cellular Base Stations
    • Broadband Wireless Access (BWA)
    • WiMAX 802.16
    • Fixed Wireless Backhaul
    • Cable Modem Termination System (CMTS)

  • Dual, 16-Bit, 800 MSPS DACs
  • Dual, 16-Bit, 250 MSPS CMOS Input Data
    • 16 Sample Input FIFO
    • Flexible Input Data Bus Options
  • High Performance
    • 81 dBc ACLR WCDMA TM1 at 70 MHz
  • Selectable 2x–8x Interpolation Filters
    • Stop-band Attenuation > 80 dB
  • Complex Mixer with 32-Bit NCO
  • Digital Quadrature Modulator Correction
    • Gain, Phase and Offset Correction
  • Digital Inverse SINC Filter
  • 3- or 4-Wire Serial Control Interface
  • On Chip 1.2-V Reference
  • Differential Scalable Output: 2 to 20 mA
  • Package: 64-pin 9×9mm QFN
  • APPLICATIONS
    • Cellular Base Stations
    • Broadband Wireless Access (BWA)
    • WiMAX 802.16
    • Fixed Wireless Backhaul
    • Cable Modem Termination System (CMTS)

The DAC5689 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5689 offers superior linearity, noise and crosstalk performance.

The DAC5689 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can be interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation.

The DAC5689 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for the natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion.

The DAC5689 is pin upgradeable to the DAC5688 which includes a clock multiplying PLL. The DAC5689 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9×9mm QFN package.

The DAC5689 is a dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with dual CMOS digital data bus, integrated 2x-8x interpolation filters, a fine frequency mixer with 32-bit complex numerically controlled oscillator (NCO), IQ compensation, and internal voltage reference. Different modes of operation enable or bypass various signal processing blocks. The DAC5689 offers superior linearity, noise and crosstalk performance.

The DAC5689 dual CMOS data bus provides 250 MSPS input data transfer per DAC channel. Several input data options are available: dual-bus data, single-bus interleaved data, even and odd multiplexing at half-rate, and an input FIFO with either external or internal clock to ease interface timing. Input data can be interpolated 2x, 4x or 8x by on-board digital interpolating FIR filters with over 80 dB of stop-band attenuation.

The DAC5689 allows both complex or real output. An optional 32-bit NCO/mixer in complex mode provides frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. A digital Inverse SINC filter compensates for the natural DAC sin(x)/x frequency roll-off. The digital Quadrature Modulator Correction (QMC) feature allows IQ compensation of phase, gain and offset to maximize sideband rejection and minimize LO feed-through of an external quadrature modulator performing the final single sideband RF up-conversion.

The DAC5689 is pin upgradeable to the DAC5688 which includes a clock multiplying PLL. The DAC5689 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin 9×9mm QFN package.

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Technical documentation

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Type Title Date
* Data sheet 16-Bit, 800 MSPS 2x–8x Interpolating Dual-Channel Digital-to-Analog Converter datasheet (Rev. A) 20 Aug 2010
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 23 Oct 2012
EVM User's guide DAC5668/88/89 EVM (Rev. A) 19 Mar 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DAC5688EVM — DAC5688 Evaluation Module

The DAC5688EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' dual-channel 16-bit 800 MSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x/4x/8x interpolation filters, on-board clock multiplier and PLL, 32-bit NCO and (...)

User guide: PDF
Not available on TI.com
GUI for evaluation module (EVM)

DAC5689EVM-SW DAC5689EVM Software Download

The DAC5689 EVM software GUI allows for programming control of the DAC5689.
Supported products & hardware

Supported products & hardware

Products
High-speed DACs (>10 MSPS)
DAC5689 Dual-Channel, 16-Bit, 800-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC)
GUI for evaluation module (EVM)

SLLC420 TSW3100EVM GUI v2.7

Supported products & hardware

Supported products & hardware

Products
High-speed DACs (>10 MSPS)
DAC3482 Dual-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC3484 Quad-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC34H84 Quad-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC5681 16-Bit, 1.0-GSPS Digital-to-Analog Converter (DAC) DAC5681Z 16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC) DAC5682Z Dual-Channel, 16-Bit, 1.0-GSPS, 1x-4x Interpolating Digital-to-Analog Converter (DAC) DAC5688 Dual-Channel, 16-Bit, 800-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC) DAC5689 Dual-Channel, 16-Bit, 800-MSPS, 1x-8x Interpolating Digital-to-Analog Converter (DAC)
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
VQFN (RGC) 64 Ultra Librarian

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Information included:
  • Fab location
  • Assembly location

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