DS90LV048A

ACTIVE

400-Mbps LVDS quad high-speed differential receiver

Product details

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVDS Output signal LVTTL, TTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package
  • > 400-Mbps (200-MHz) Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 150-ps Channel-to-Channel Skew (Typical)
  • 100-ps Differential Skew (Typical)
  • 2.7-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • High Impedance LVDS Inputs on Power Down
  • Low Power Design (40 mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Drivers
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Input Failsafe
    • Open, Short, and Terminated
  • 0 V to –100 mV Threshold Region
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Operating Temperature Range: –40°C to +85°C
  • Available in SOIC and TSSOP Package

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.

The DS90LV048A device is a quad CMOS flow-through differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV048A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100-Ω) input fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV048A has a flow-through pinout for easy PCB layout.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four receivers. The DS90LV048A and companion LVDS line driver (for example, DS90LV047A) provide a new alternative to high-power PECL/ECL devices for high-speed point-to-point interface applications.

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Technical documentation

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Type Title Date
* Data sheet DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. C) PDF | HTML 29 Jul 2016
Application note Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 29 Oct 2020
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29 Jun 2019
Application brief LVDS to Improve EMC in Motor Drives 27 Sep 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 May 2018
Application note An Overview of LVDS Technology 05 Oct 1998

Design & development

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Evaluation board

DS90LV047-48AEVM — DS90LV047-48AEVM evaluation module

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
User guide: PDF
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Simulation model

DS90LV048A IBIS Model

SNLM165.ZIP (8 KB) - IBIS Model
Simulation tool

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
SOIC (D) 16 View options
TSSOP (PW) 16 View options

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