SN74LVC1G10 Single 3-Input Positive-NAND Gate | TI.com

SN74LVC1G10
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Single 3-Input Positive-NAND Gate

Single 3-Input Positive-NAND Gate - SN74LVC1G10
Datasheet
SN74LVC1G10 datasheet (Rev. E)
 

Description

The SN74LVC1G10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged Device Model (C101)

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Rating Data rate (Max) (Mbps) Operating temperature range (C) Package size: mm2:W x L (PKG) Package Group
SN74LVC1G10 Order now LVC     1.65     5.5     1     3     32     -32     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    		 Catalog     100     -40 to 125
-40 to 85    		 6DSBGA: 2 mm2: 1.25 x 1.75 (DSBGA | 6)
6SC70: 4 mm2: 2.1 x 2 (SC70 | 6)
6SON: 1 mm2: 1 x 1 (SON | 6)
6SON: 1 mm2: 1 x 1.45 (SON | 6)
6SOT-23: 5 mm2: 1.6 x 2.9 (SOT-23 | 6)    		 DSBGA | 6
SC70 | 6
SON | 6
SON | 6
SOT-23 | 6