5.7kVrms, 4A/5A single-channel opto-compatible isolated gate driver with 8 & 12 V UVLO option
Product details
Parameters
Package | Pins | Size
Features
- single channel isolated gate driver with opto-compatible input
- Pin-to-pin, drop in upgrade for opto isolated gate drivers
- peak output current
- 14-V to 33-V output driver supply voltage
- 8-V (B) and 12-V VCC UVLO Options
- Rail-to-rail output
- 105-ns (maximum) propagation delay
- 25-ns (maximum) part-to-part delay matching
- 35-ns (maximum) pulse width distortion
- 150-kV/µs (minimum) common-mode transient immunity (CMTI)
- Isolation barrier life >50 Years
- 13-V reverse polarity voltage handling capability on input stage
- Stretched SO-6 package with >8.5-mm creepage and clearance
- Operating junction temperature, TJ: –40°C to +150°C
- Safety-related certifications:
- 8000-VPK reinforced isolation per DIN V VDE V0884-11: 2017-01
- 5.7-kVRMS isolation for 1 minute per UL 1577
- CQC certification per GB4943.1-2011
Description
The opto-compatible, single-channel, isolated gate driver for IGBTs, MOSFETs and SiC MOSFETs, with 4.5-A source and 5.3-A sink peak output current and 5.7-kVRMS isolation rating. The high supply voltage range of 33-V allows the use of bipolar supplies to effectively drive IGBTs and SiC power FETs. can drive both low side and high side power FETs bring significant performance and reliability upgrades over opto-coupler based gate drivers while maintaining pin-to-pin compatibility in both schematic and layout design. Performance highlights include high common mode transient immunity (CMTI), low propagation delay, and small pulse width distortion. Tight process control results in small part-to-part skew. The input stage is an emulated diode (e-diode) which means long term reliability and excellent aging characteristics compared to traditional LEDs. igh performance and reliability makes ideal for use in all types of motor drives, . The higher operating temperature opens up opportunities for applications not supported by traditional optocouplers.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- 5-V VDD input buffer, and up to 35-V VCC power supply range
- 4-A and 5-A source/sink current capability
- 5-kVRMS Isolation for 1 minute per UL 1577
- Maximized creepage distance between two output channels
- Reverse polarity voltage handling capability on device inputs
- PCB layout optimized for power supply (...)
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download TIDA-010025 BOM Files.zip (233KB) -
download TIDA-010025 Assembly Files.zip (1084KB) -
download TIDA-010025 Layer Plots.zip (2614KB) -
download TIDA-010025 CAD Files.zip (3698KB) -
download TIDA-010025 Gerber.zip (1507KB)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| SOIC (DWY) | 6 | View options |
Ordering & quality
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- Ongoing reliability monitoring
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