TPS3307-18M

ACTIVE

Triple Processor Supervisors

Product details

Number of supplies monitored 3 Threshold voltage 1 (typ) (V) 1.25, 1.68, 2.93 Features Manual reset capable Reset threshold accuracy (%) 2.7 Iq (typ) (mA) 0.015 Output driver type/reset output Active-low, Push-Pull Time delay (ms) 200 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Rating Military Watchdog timer WDI (s) None Operating temperature range (°C) -55 to 125
Number of supplies monitored 3 Threshold voltage 1 (typ) (V) 1.25, 1.68, 2.93 Features Manual reset capable Reset threshold accuracy (%) 2.7 Iq (typ) (mA) 0.015 Output driver type/reset output Active-low, Push-Pull Time delay (ms) 200 Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Rating Military Watchdog timer WDI (s) None Operating temperature range (°C) -55 to 125
CDIP (JG) 8 64.032 mm² 9.6 x 6.67 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Qualified for Military Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
    Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Triple Supervisory Circuits for DSP and Processor-Based Systems
  • Power-On Reset Generator with Fixed Delay Time of 200 ms, No External
    Capacitor Needed
  • Temperature-Compensated Voltage Reference
  • Maximum Supply Current of 40 µA
  • Supply Voltage Range . . . 2 V to 6 V
  • Defined RESET Output from VDD ≥ 1.1 V
  • CDIP-8 and LCCC-20 Packages
  • Temperature Range . . . .–55°C to 125deg;C

  • Qualified for Military Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015;
    Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Triple Supervisory Circuits for DSP and Processor-Based Systems
  • Power-On Reset Generator with Fixed Delay Time of 200 ms, No External
    Capacitor Needed
  • Temperature-Compensated Voltage Reference
  • Maximum Supply Current of 40 µA
  • Supply Voltage Range . . . 2 V to 6 V
  • Defined RESET Output from VDD ≥ 1.1 V
  • CDIP-8 and LCCC-20 Packages
  • Temperature Range . . . .–55°C to 125deg;C

The TPS3307-18 is a micropower supply voltage supervisor designed for circuit initialization primarily in automotive DSP and processor-based systems, which require more than one supply voltage.

The TPS3307-18 is designed for monitoring three independent supply voltages: 3.3 V/1.8 V/adj,. The adjustable SENSE input allows the monitoring of any supply voltage >1.25 V.

The various supply voltage supervisors are designed to monitor the nominal supply voltage as shown in the following supply voltage monitoring table.

During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remain below the threshold voltage VIT+.

An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td typ = 200 ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+. When the voltage at any SENSE input drops below the threshold voltage VIT–, the RESET output becomes active (low) again.

The TPS3307-18 incorporates a manual reset input, MR. A low level at MR causes RESET to become active. In addition to the active-low RESET output, the TPS3307-18 includes an active-high RESET output.

The TPS3307-18 is a micropower supply voltage supervisor designed for circuit initialization primarily in automotive DSP and processor-based systems, which require more than one supply voltage.

The TPS3307-18 is designed for monitoring three independent supply voltages: 3.3 V/1.8 V/adj,. The adjustable SENSE input allows the monitoring of any supply voltage >1.25 V.

The various supply voltage supervisors are designed to monitor the nominal supply voltage as shown in the following supply voltage monitoring table.

During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remain below the threshold voltage VIT+.

An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td typ = 200 ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+. When the voltage at any SENSE input drops below the threshold voltage VIT–, the RESET output becomes active (low) again.

The TPS3307-18 incorporates a manual reset input, MR. A low level at MR causes RESET to become active. In addition to the active-low RESET output, the TPS3307-18 includes an active-high RESET output.

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Type Title Date
* Data sheet TPS3307: Triple Processor Supervisors datasheet (Rev. A) 24 Nov 2003
* SMD TPS3307-18M SMD 5962-99591 21 Jun 2016
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics 28 Jun 2019

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CDIP (JG) 8 View options
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