TPS51206

ACTIVE

2A Peak Sink/Source DDR Termination Regulator with VTTREF Buffered Reference for DDR2/3/3L/4

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* Datasheet TPS51206 2-A Peak Sink / Source DDR Termination Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and DDR4 datasheet (Rev. E) Jul. 19, 2018
Selection guides Power Management Guide 2018 (Rev. R) Jun. 25, 2018
Application notes DDR VTT Power Solutions: A Competitive Analysis Apr. 27, 2018
Technical articles A New Understanding: Blast Motion redefines movement, tracking and training for athletes. Aug. 06, 2014
Technical articles Improving Fly-Buck Regulation Using Opto (Part-1) Jul. 15, 2014
Technical articles Altium and WEBENCH – together at last Jul. 12, 2014
Technical articles Using telemetry in point-of-load applications Jun. 24, 2014
Selection guides Power, Interface and Switch Solutions for Micron Memory (Rev. A) Jun. 18, 2013
More literature Computing DDR DC-DC Power Solutions Aug. 22, 2012
Selection guides Power Management Solutions Set-Top Box and Digital TV (Rev. A) Apr. 18, 2012
User guides TPS51206EVM-745 User's Guide Aug. 05, 2011
Application notes Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs Apr. 28, 2010
Application notes Power Two Xilinx(TM) LX240 Virtex-6(TM) Devices Apr. 20, 2010
Application notes Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472) Mar. 31, 2010
Application notes 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) Mar. 26, 2010
Application notes Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs Mar. 26, 2010
Application notes TMS320C6472 5V Input Pwr Design, Integrated FET DC/DC Converters and Controllers Mar. 26, 2010