Produktdetails

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6600 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 1.9 Iq per channel (typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6600 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 1.9 Iq per channel (typ) (mA) 37.7 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 108 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

  • Fully-Differential Architecture
  • Centered Input Common-Mode Range
  • Output Common-Mode Control
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 1900 MHz
  • Slew Rate: 6600 V/µs
  • 1% Settling Time: 2 ns
  • HD2: –75 dBc at 100 MHz
  • HD3: –80 dBc at 100 MHz
  • OIP3: 37 dBm at 70 MHz
  • Input Voltage Noise: 1.9 nV/√Hz (f > 10 MHz)
  • Power-Supply Voltage: 3 V to 5 V
  • Power-Supply Current: 37.7 mA
  • Power-Down Current: 0.65 mA
  • APPLICATIONS
    • 5-V Data Acquisition Systems High Linearity ADC Amplifiers
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

All other trademarks are the property of their respective owners

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

The THS4509 device is a wideband, fully-differential op amp designed for 5-V data acquisition systems. It has a low noise at 1.9 nV/√Hz, and low harmonic distortion of –75 dBc HD2 and –80 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-kΩ load. Slew rate is high at 6600 V/µs, and with settling time of 2 ns to 1% (2-V step), it is ideal for pulsed applications. It is designed for a minimum gain of 6 dB, but is optimized for gains of 10 dB.

To allow for DC coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 3-mV offset (typical) from the set voltage, when set within 0.5-V of midsupply, with less than 4-mV differential offset voltage. The common-mode set point is set to midsupply by internal circuitry, which may be overdriven from an external source.

The input and output are optimized for best performance with the common-mode voltages set to midsupply. Along with high performance at low power-supply voltage, this design makes it ideal for high-performance, single-supply 5-V data acquisition systems. The combined performance of the THS4509 in a gain of 10 dB driving the ADS5500 ADC, sampling at 125 MSPS, is 81-dBc SFDR and 69.1-dBc SNR with a –1 dBFS signal at 70 MHz.

The THS4509 is offered in a quad, leadless VQFN-16 package (RGT), and is characterized for operation over the full industrial temperature range from –40°C to +85°C.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet THS4509 Wideband, Low-Noise, Low-Distortion, Fully-Differential Amplifier datasheet (Rev. I) PDF | HTML 29 Jul 2016
Product overview Pairing ADC Drivers With Fully-Differential Input ADCs for Wide Bandwidth Data Acquisition 01 Apr 2024
Analog Design Journal Q3 2009 Issue Analog Applications Journal 24 Sep 2018
Analog Design Journal Q4 2009 Issue Analog Applications Journal 24 Sep 2018
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mär 2017
Application note Design for a Wideband Differential Transimpedance DAC Output (Rev. A) 17 Okt 2016
Application note Fully-Differential Amplifiers (Rev. E) 19 Sep 2016
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Analog Design Journal Using fully differential op amps as attenuators, Part 3 04 Okt 2009
Analog Design Journal Using fully differential op amps as attenuators, Part 2 14 Jul 2009
Analog Design Journal Output impedance matching with fully differential operational amplifiers 11 Mär 2009
Analog Design Journal Q1 2009 Issue Analog Applications Journal 11 Mär 2009
Application note Design for a Wideband Differential Transimpedance DAC Output 18 Apr 2008
Analog Design Journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 10 Okt 2005
Analog Design Journal Analysis of fully differential amplifiers 11 Mär 2005
Analog Design Journal Fully differential amplifiers applications:Line termination,driving high-speed.. 02 Mär 2005
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

THS4508EVM — THS4508-Evaluierungsmodul

THS4508EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4508EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10 dB and 50 ohm input and (...)

Evaluierungsplatine

THS4509EVM — THS4509 – Evaluierungsmodul

THS4509RGT Eval 1 EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4509RGT Eval 1 EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 10dB (...)

Evaluierungsplatine

THS4511EVM — THS4511 – Evaluierungsmodul

THS4511EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4511EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 ohm input and (...)

Evaluierungsplatine

THS4513EVM — THS4513 – Evaluierungsmodul

THS4513EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4513EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0dB and 50 ohm input and (...)

Evaluierungsplatine

THS4520EVM — THS4520-Evaluierungsmodul

THS4520EVM is an evaluation Module for the RGT (16 pin leadless QFN) package.

The THS4520EVM is designed to demonstrate the functionality and versatility of the device. The EVM is ready for power, signal source, and test instruments. The EVM is configured for a gain of 0 dB and 50 Ω (...)

Simulationsmodell

THS4509 PSpice Model (Rev. D)

SLOC050D.ZIP (55 KB) - PSpice Model
Simulationsmodell

THS4509 TINA-TI Reference Design (Rev. B)

SLOM152B.TSC (53 KB) - TINA-TI Reference Design
Simulationsmodell

THS4509 TINA-TI Spice Model (Rev. A)

SLOM151A.ZIP (5 KB) - TINA-TI Spice Model
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TIDA-00093 — Referenzdesign zur Optimierung des THS4509 zum Ansteuern von Highspeed-A/D-Wandlern

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