Produktdetails

DSP type 4 C66x DSP (max) (MHz) 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
DSP type 4 C66x DSP (max) (MHz) 1000, 1200 CPU 32-/64-bit Operating system DSP/BIOS Ethernet MAC 10/100/1000 PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
FCBGA (CYP) 841 576 mm² 24 x 24
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TMS320C6670 Multicore Fixed and Floating-Point System-on-Chip datasheet (Rev. D) 07 Mär 2012
* Errata TMS320C6670 Multicore Fixed and Floating-Point SoC Errata (Revision 1.0, 2.0) (Rev. F) 15 Mai 2014
Application note DDR3 Design Requirements for KeyStone Devices (Rev. D) PDF | HTML 07 Jul 2022
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) 25 Jun 2021
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 19 Mai 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 Jun 2020
Application note Keystone Bootloader Resources and FAQ 29 Mai 2019
Application note Keystone Multicore Device Family Schematic Checklist PDF | HTML 17 Mai 2019
Application note Hardware Design Guide for KeyStone Devices (Rev. D) 21 Mär 2019
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 Aug 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) 26 Jul 2017
Application note KeyStone I DDR3 Initialization (Rev. E) 28 Okt 2016
Application note Keystone NDK FAQ 03 Okt 2016
White paper A Diverse High Performance Platform for Advanced Driver Assistance System 28 Sep 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices 13 Apr 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs 23 Feb 2016
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) 06 Mai 2015
User guide Bit Rate Coprocessor (BCP) for KeyStone Devices User's Guide (Rev. A) 27 Apr 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) PDF | HTML 09 Apr 2015
User guide Antenna Interface 2 (AIF2) for KeyStone I Devices User's Guide (Rev. E) 06 Feb 2015
User guide DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) 20 Jan 2015
Application note TI Keystone DSP Hyperlink SerDes IBIS-AMI Models 09 Okt 2014
Application note TI Keystone DSP PCIe SerDes IBIS-AMI Models 09 Okt 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) 04 Sep 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) 03 Sep 2014
More literature KeyStone Lab Manual - Training 05 Jun 2014
User guide System Analyzer User's Guide (Rev. F) 18 Nov 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) 30 Sep 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) 15 Jul 2013
White paper Accelerating high-performance computing development with Desktop Linux SDK 08 Jul 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) 03 Jul 2013
User guide C66x CorePac User's Guide (Rev. C) 28 Jun 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) 28 Jun 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) 28 Mai 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) 05 Feb 2013
Application note SerDes Implementation Guidelines for KeyStone I Devices 31 Okt 2012
Application note Multicore Programming Guide (Rev. B) 29 Aug 2012
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 Aug 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 Aug 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) 11 Jul 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) 24 Apr 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 30 Mär 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) 27 Mär 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) 22 Mär 2012
White paper Maximizing Multicore Efficiency with Navigator Runtime 23 Feb 2012
User guide Fast Fourier Transform Coprocessor (FFTC) for KeyStone Devices User's Guide (Rev. C) 20 Dez 2011
Application note PCIe Use Cases for KeyStone Devices 13 Dez 2011
User guide Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) 15 Okt 2011
Application note Introduction to TMS320C6000 DSP Optimization 06 Okt 2011
User guide Debug and Trace for KeyStone I Devices User's Guide (Rev. A) 22 Sep 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide 02 Sep 2011
White paper KeyStone Multicore SoC Tool Suite: one platform for all needs 17 Jun 2011
User guide Viterbi-Decoder Coprocessor 2 (VCP2) for KeyStone Devices User's Guide (Rev. A) 10 Jun 2011
Product overview TMS320C6670 Breakthrough Performance for Process-Intensive Applications (Rev. B) 09 Jun 2011
Application note TMS320C66x DSP Generation of Devices (Rev. A) 25 Apr 2011
Application note Tuning VCP2 and TCP2 Bit Error Rate Performance 11 Feb 2011
White paper KeyStone Memory Architecture White Paper (Rev. A) 21 Dez 2010
User guide Turbo Decoder Coprocessor 3 (TCP3D) for KeyStone Devices User's Guide 18 Nov 2010
User guide C66x CPU and Instruction Set Reference Guide 09 Nov 2010
User guide C66x DSP Cache User's Guide 09 Nov 2010
Application note Clocking Design Guide for KeyStone Devices 09 Nov 2010
Application note Connecting AIF to FFTC Guide for KeyStone Devices 09 Nov 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide 09 Nov 2010
Application note Migrating From AIF1 to AIF2 for KeyStone Devices 09 Nov 2010
Application note Optimizing Loops on the C66x DSP 09 Nov 2010
User guide Turbo Encoder Coprocessor 3 (TCP3E) for KeyStone Devices User's Guide 09 Nov 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG 09 Nov 2010
User guide Network Coprocessor for KeyStone Devices User's Guide 02 Nov 2010

Design und Entwicklung

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Entwicklungskit

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Schnittstellenadapter

HL5CABLE — Hyperlink-Kabel

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Software-Entwicklungskit (SDK)

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Software-Entwicklungskit (SDK)

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Test report: PDF
Schaltplan: PDF
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FCBGA (CYP) 841 Optionen anzeigen

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