DS90LV018A

ACTIVE

3-V LVDS single CMOS differential line receiver

Product details

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • >400 Mbps (200 MHz) Switching Rates
  • 50 ps Differential Skew (Typical)
  • 2.5 ns Maximum Propagation Delay
  • 3.3V Power Supply Design
  • Flow-Through Pinout
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (18mW @ 3.3V Static)
  • Interoperable with Existing 5V LVDS Networks
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Open, Short and Terminated Input Fail-Safe
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Industrial Temperature Operating Range
    • (−40°C to +85°C)
  • Available in SOIC Package

All trademarks are the property of their respective owners.

  • >400 Mbps (200 MHz) Switching Rates
  • 50 ps Differential Skew (Typical)
  • 2.5 ns Maximum Propagation Delay
  • 3.3V Power Supply Design
  • Flow-Through Pinout
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (18mW @ 3.3V Static)
  • Interoperable with Existing 5V LVDS Networks
  • Accepts Small Swing (350 mV Typical) Differential Signal Levels
  • Supports Open, Short and Terminated Input Fail-Safe
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Industrial Temperature Operating Range
    • (−40°C to +85°C)
  • Available in SOIC Package

All trademarks are the property of their respective owners.

The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV018A has a flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

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Technical documentation

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Type Title Date
* Data sheet DS90LV018A 3V LVDS Single CMOS Differential Line Receiver datasheet (Rev. D) 16 Apr 2013
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 Aug 2018
Application brief DACx1416 Delivers Optimized Solution to Mach Zehnder Modulator Biasing 29 Jun 2018
Application note An Overview of LVDS Technology 05 Oct 1998

Design & development

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Evaluation board

DS90LV047-48AEVM — DS90LV047-48AEVM evaluation module

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
User guide: PDF
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Simulation model

DS90LV018A IBIS Model

SNLM059.ZIP (4 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
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