전원 관리 게이트 드라이버 저압측 드라이버

UCC27527

활성

5V UVLO, 활성화, 듀얼 CMOS 입력을 지원하는 5A/5A 듀얼 채널 게이트 드라이버

제품 상세 정보

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Flexible, Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Flexible, Inverting, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Negative Voltage Handling on Input Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.017 Input threshold CMOS Channel input logic Dual, Flexible, Inverting, Non-Inverting Input negative voltage (V) -5 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Flexible, Inverting, Non-Inverting
WSON (DSD) 8 9 mm² 3 x 3
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold (Function of
    Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8, and 3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on Input Pins
  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold (Function of
    Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise
    Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures
    Glitch-Free Operation at Power Up and Power
    Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8, and 3-mm × 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on Input Pins

The UCC2752x family of devices are dual-channel, high-speed, low-side gate driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 17 ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The Enable pins are based on TTL and CMOS compatible logic, independent of VDD supply voltage.

The UCC27528 is a dual noninverting driver. UCC27527 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family to ensure that outputs are held low when input pins are in floating condition. UCC27528 features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active high logic and can be left open for standard operation.

The UCC2752x family of devices are dual-channel, high-speed, low-side gate driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 17 ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The Enable pins are based on TTL and CMOS compatible logic, independent of VDD supply voltage.

The UCC27528 is a dual noninverting driver. UCC27527 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family to ensure that outputs are held low when input pins are in floating condition. UCC27528 features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active high logic and can be left open for standard operation.

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기술 문서

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모두 보기6
유형 직함 날짜
* Data sheet UCC2752x Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic datasheet (Rev. E) PDF | HTML 2014/12/05
Application note Why use a Gate Drive Transformer? PDF | HTML 2024/03/04
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/02/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/02/28
Application note Improving Efficiency of DC-DC Conversion through Layout 2019/05/07
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018/10/29

설계 및 개발

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시뮬레이션 모델

UCC27527 PSpice Transient Model

SLUM386.ZIP (58 KB) - PSpice Model
시뮬레이션 모델

UCC27527 Unencrypted PSpice Transient Model

SLUM479.ZIP (2 KB) - PSpice Model
계산 툴

SLURB22 UCC2752X Schematic Review Template

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
저압측 드라이버
UCC27523 5V UVLO, 인버팅 입력 및 활성화를 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27524 5V UVLO, 활성화 및 1ns 지연 매칭을 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27524A 5V UVLO, 활성화 및 음극 입력 전압 처리를 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27524A-Q1 5V UVLO 및 음극 입력 전압 처리를 지원하는 오토모티브 5A/5A 듀얼 채널 게이트 드라이버 UCC27524A1-Q1 5V UVLO 및 음극 입력 전압 처리를 지원하는 오토모티브 5A/5A 듀얼 채널 게이트 드라이버 UCC27525 5V UVLO, 활성화 및 인버팅/비인버팅 입력을 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27526 5V UVLO, 활성화, 듀얼 TTL 입력을 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27527 5V UVLO, 활성화, 듀얼 CMOS 입력을 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27528 5V UVLO, CMOS 입력 및 활성화를 지원하는 5A/5A 듀얼 채널 게이트 드라이버 UCC27528-Q1 5V UVLO 및 CMOS 입력을 지원하는 오토모티브 5A/5A 듀얼 채널 게이트 드라이버
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 다운로드
WSON (DSD) 8 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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