產品詳細資料

Resolution (Bits) 12 Sample rate (max) (ksps) 200 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Automotive Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 2.43 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
Resolution (Bits) 12 Sample rate (max) (ksps) 200 Number of input channels 11 Interface type SPI Architecture SAR Input type Single-ended Multichannel configuration Multiplexed Rating Automotive Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 2.43 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Qualified for Automotive Applications
  • 12-Bit-Resolution Analog-to-Digital Converter
    (ADC)
  • Up to 200-KSPS (150-KSPS for 3 V) Throughput
    Over Operating Temperature Range With 12-Bit
    Output Mode
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample and Hold Function
  • Linearity Error of +1 LSB (Max)
  • On-Chip Conversion Clock
  • Unipolar or Bipolar Output Operation
  • Programmable Most Significant Bit (MSB) or Least
    Significant Bit (LSB) First
  • Programmable Power Down
  • Programmable Output Data Length
  • SPI Compatible Serial Interface With I/O Clock
    Frequencies up to 15 MHz (CPOL = 0, CPHA = 0)
  • Qualified for Automotive Applications
  • 12-Bit-Resolution Analog-to-Digital Converter
    (ADC)
  • Up to 200-KSPS (150-KSPS for 3 V) Throughput
    Over Operating Temperature Range With 12-Bit
    Output Mode
  • 11 Analog Input Channels
  • Three Built-In Self-Test Modes
  • Inherent Sample and Hold Function
  • Linearity Error of +1 LSB (Max)
  • On-Chip Conversion Clock
  • Unipolar or Bipolar Output Operation
  • Programmable Most Significant Bit (MSB) or Least
    Significant Bit (LSB) First
  • Programmable Power Down
  • Programmable Output Data Length
  • SPI Compatible Serial Interface With I/O Clock
    Frequencies up to 15 MHz (CPOL = 0, CPHA = 0)

The TLV2553-Q1 is a 12-bit switched-capacitor successive-approximation analog-to-digital converter (ADC). The ADC has three control inputs [chip select (CS), the input-output clock, and the address/control input (DATAIN)] designed for communication with the serial port of a host processor or peripheral through a serial 3-state output.

In addition to the high-speed converter and versatile control capability, the device has an on-chip 14-channel multiplexer that can select any one of 11 inputs or any one of three internal self-test voltages using configuration register 1. The sample-and-hold function is automatic. At the end of conversion, when programmed as EOC, the pin 19 output goes high to indicate that conversion is complete. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.

The TLV2553-Q1 is characterized for operation from TA = –40°C to 85°C.

The TLV2553-Q1 is a 12-bit switched-capacitor successive-approximation analog-to-digital converter (ADC). The ADC has three control inputs [chip select (CS), the input-output clock, and the address/control input (DATAIN)] designed for communication with the serial port of a host processor or peripheral through a serial 3-state output.

In addition to the high-speed converter and versatile control capability, the device has an on-chip 14-channel multiplexer that can select any one of 11 inputs or any one of three internal self-test voltages using configuration register 1. The sample-and-hold function is automatic. At the end of conversion, when programmed as EOC, the pin 19 output goes high to indicate that conversion is complete. The converter incorporated in the device features differential high-impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.

The TLV2553-Q1 is characterized for operation from TA = –40°C to 85°C.

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* Data sheet TLV2553-Q1 12-Bit 200-KSPS 11-Channel Low-Power Serial ADC datasheet (Rev. A) PDF | HTML 2015年 6月 4日
EVM User's guide TLV2553EVM-PDK User's Guide (Rev. A) 2019年 9月 13日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010年 11月 10日

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The TLV2553 evaluation module (EVM) performance development kit (PDK) is a platform for evaluating the TLV2553 successive approximation register (SAR) analog-to-digital converter (ADC).

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TLV2553 具備關機功能的 12 位元 200-KSPS 11 通道低功耗序列 ADC TLV2553-Q1 具備關機功能的車用 12 位元 200-KSPS 11 通道低功耗序列 ADC
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