TLV2553
- 12-Bit-Resolution A/D Converter
- Up to 200 KSPS (150 KSPS for 3 V) Throughput
Over Operating Temperature Range With 12-Bit
Output Mode - 11 Analog Input Channels
- 3 Built-In Self-Test Modes
- Inherent Sample and Hold Function
- Linearity Error, ±1 LSB Maximum
- On-Chip Conversion Clock
- Unipolar or Bipolar Output Operation
- Programmable MSB or LSB First
- Programmable Power Down
- Programmable Output Data Length
- SPI Compatible Serial Interface With I/O Clock
Frequencies up to 15 MHz (CPOL=0, CPHA=0)
The TLV2553 is a 12-bit, switched-capacitor, successive-approximation, analog-to-digital converter. The ADC has three control inputs [chip select (CS), the input-output clock, and the address/control input (DATAIN)], designed for communication with the serial port of a host processor or peripheral through a serial 3-state output.
In addition to the high-speed converter and versatile control capability, the device has an on-chip 14-channel multiplexer that can select any one of 11 inputs or any one of three internal self-test voltages using configuration register 1. The sample-and-hold function is automatic. At the end of conversion, when programmed as EOC, the pin 19 output goes high to indicate that conversion is complete. The converter incorporated in the device features differential, high- impedance reference inputs that facilitate ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating temperature range.
The TLV2553I is characterized for operation from TA = 40°C to 85°C.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TLV2553 12-Bit, 200-KSPS, 11-Channel, Low-Power, Serial ADC datasheet (Rev. C) | PDF | HTML | 2015年 7月 9日 |
EVM User's guide | TLV2553EVM-PDK User's Guide (Rev. A) | 2019年 9月 13日 | ||
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015年 5月 21日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011年 3月 17日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010年 11月 10日 |
設計與開發
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5-6KINTERFACE — 5-6K 介面評估模組
The interface board consists of two signal conditioning sites, two serial EVM sites, and a parallel EVM site. Regardless of the interface type, all EVMs compatible with the 5-6K Interface Board have a standard analog interface and standard power connector. Three position screw terminals J1 and J2 (...)
TLV2553EVM-PDK — TLV2553 11 通道低功耗序列 ADC 評估模組性能開發套件 (PDK)
The TLV2553 evaluation module (EVM) performance development kit (PDK) is a platform for evaluating the TLV2553 successive approximation register (SAR) analog-to-digital converter (ADC).
The evaluation kit includes the TLV2553EVM, precision host interface (PHI) controller board, and (...)
ADC-TO-VREF-SELECT — ADC to Voltage Reference Selection Tool
The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired input voltage, and the tool will list the top three voltage reference recommendations. There is also an option to use (...)
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系列電壓參考
ANALOG-ENGINEER-CALC — 類比工程師計算機
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 引腳 | 下載 |
---|---|---|
SOIC (DW) | 20 | 檢視選項 |
TSSOP (PW) | 20 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
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