SBAS843A september 2017 – july 2023 ADS8588H
PRODUCTION DATA
The RESET pin is an active-high digital input. A dedicated reset pin allows the device to be reset at any time in an asynchronous manner. All digital circuitry in the device is reset when the RESET pin is set to logic high and this condition remains active until the pin returns low. The device must always be reset after power-up as well as after recovery from shut-down mode when all the supplies and references have settled to the required accuracy. If the RESET is issued during an ongoing conversion process, then the device aborts the conversion and output data are invalid. If the reset signal is applied during a data read operation, then the output data registers are all reset to zero.
In order to initiate the next conversion cycle after deactivating a reset condition, allow for a minimum time delay between the falling edge of the RESET input and the rising edge of the CONVSTA, CONVSTB inputs (see the Timing Requirements: CONVST Control table). Any violation in this timing requirement can result in corrupting the results from the next conversion.