SBOS531E August   2010  – June 2019 AFE031


  1. Features
  2. Applications
  3. Description
    1.     Device Images
  4. Revision History
  5. Description, continued
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Thermal Information
    4. 8.4  Electrical Characteristics: Transmitter (Tx)
    5. 8.5  Electrical Characteristics: Power Amplifier (PA)
    6. 8.6  Electrical Characteristics: Receiver (Rx)
    7. 8.7  Electrical Characteristics: Digital
    8. 8.8  Electrical Characteristics: Two-Wire Interface
    9. 8.9  Electrical Characteristics: Internal Bias Generator
    10. 8.10 Electrical Characteristics: Power Supply
    11. 8.11 Timing Requirements
    12. 8.12 Timing Diagrams
    13. 8.13 Typical Characteristics
  9. Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Feature Description
      1. 9.2.1 PA Block
      2. 9.2.2 Tx Block
      3. 9.2.3 Rx Block
      4. 9.2.4 DAC Block
      5. 9.2.5 REF1 and REF2 Blocks
      6. 9.2.6 Zero Crossing Detector Block
      7. 9.2.7 ETx and ERx Blocks
    3. 9.3 Power Supplies
    4. 9.4 Pin Descriptions
      1. 9.4.1 Current Overload
      2. 9.4.2 Thermal Overload
    5. 9.5 Calibration Modes
      1. 9.5.1 Tx Calibration Mode
      2. 9.5.2 Rx Calibration Mode
    6. 9.6 Serial Interface
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Detailed Design Procedure
        1. Line-Coupling Circuit
        2. Circuit Protection
        3. Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. Powerline Communications Developer’s Kit
        2. TINA-TI™ (Free Software Download)
        3. TI Precision Designs
        4. WEBENCH Filter Designer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

PA Block

The Power Amplifier (PA) block consists of a high slew rate, high-voltage, and high-current operational amplifier. The PA is configured with an inverting gain of 6.5 V/V, has a low-pass filter response, and maintains excellent linearity and low distortion. The PA is specified to operate from 7 V to 24 V and can deliver up to ±1.5 A of continuous output current over the specified junction temperature range of –40°C to +125°C. Figure 24 illustrates the PA block.

AFE031 ai_pa_bd_generic_bos531.gifFigure 24. PA Block Equivalent Circuit

Connecting the PA in a typical PLC application requires only two additional components: an ac coupling capacitor, CIN, and the current limit programming resistor, RSET. Figure 25 shows the typical connections to the PA block.

AFE031 ai_pa_bd_config_bos531.gifFigure 25. Typical Connections to the PA

The external capacitor, CIN, introduces a single-pole, high-pass characteristic to the PA transfer function; combined with the inherent low-pass transfer function, this characteristic results in a passband response. The value of the high-pass cutoff frequency is determined by CIN reacting with the input resistance of the PA circuit, and can be found from Equation 1:

Equation 1. AFE031 q_cin01_bos531.gif


  • CIN = external input capacitor
  • fHP = desired high-pass cutoff frequency

For example, setting CIN to 3.3 nF results in a high-pass cutoff frequency of 2.4 kHz. The voltage rating for CIN should be determined to withstand operation up to the PA power-supply voltage.

When the transmitter is not in use, the output can be disabled and placed into a high-impedance state by writing a '0' to the PA-OUT bit in the Enable2 Register. Additional power savings can be realized by shutting down the PA when not in use. Shutting down the PA for power savings is accomplished by writing a '0' to the PA bit in the Enable1 Register. Shutting down the PA also results in the PA output entering a high-impedance state. When the PA shuts down, it consumes only 2 mW of power.

The PA_ISET pin (pin 46) provides a resistor-programmable output current limit for the PA block. Equation 2 determines the value of the external RSET resistor attached to this pin.

Equation 2. AFE031 q_rset_bos531.gif


  • RSET = the value of the external resistor connected between pin 46 and ground.
  • ILIM = the value of the desired current limit for the PA.

Note that to ensure proper design margin with respect to manufacturing and temperature variations, a 30% decrease of the value used in Equation 2 for ILIM over the nominal value of ILIM is recommended. See Figure 20, PA Current Limit vs RSET.