SPRSP74E October   2022  – August 2025 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
    1. 3.1 Functional Block Diagram
  5. 4 Device Comparison
    1. 4.1 Related Products
  6. 5 Terminal Configuration and Functions
    1. 5.1 Pin Diagram
      1. 5.1.1 ZCZ Pin Diagram
    2. 5.2 Pin Attributes
      1.      12
      2.      13
    3. 5.3 Signal Descriptions
      1.      15
      2. 5.3.1  ADC
        1.       17
        2.       18
        3.       19
        4.       20
        5.       21
        6. 5.3.1.1 ADC-CMPSS Signal Connections
      3. 5.3.2  ADC_CAL
        1.       24
      4. 5.3.3  ADC VREF
        1.       26
      5. 5.3.4  CPSW
        1.       28
        2.       29
        3.       30
        4.       31
        5.       32
        6.       33
        7.       34
      6. 5.3.5  CPTS
        1.       36
      7. 5.3.6  DAC
        1.       38
      8. 5.3.7  Emulation and Debug
        1.       40
        2.       41
      9. 5.3.8  EPWM
        1.       43
        2.       44
        3.       45
        4.       46
        5.       47
        6.       48
        7.       49
        8.       50
        9.       51
        10.       52
        11.       53
        12.       54
        13.       55
        14.       56
        15.       57
        16.       58
        17.       59
        18.       60
        19.       61
        20.       62
        21.       63
        22.       64
        23.       65
        24.       66
        25.       67
        26.       68
        27.       69
        28.       70
        29.       71
        30.       72
        31.       73
        32.       74
      10. 5.3.9  EQEP
        1.       76
        2.       77
        3.       78
      11. 5.3.10 FSI
        1.       80
        2.       81
        3.       82
        4.       83
        5.       84
        6.       85
        7.       86
        8.       87
      12. 5.3.11 GPIO
        1.       89
      13. 5.3.12 GPMC
        1.       91
      14. 5.3.13 I2C
        1.       93
        2.       94
        3.       95
        4.       96
        5.       97
      15. 5.3.14 LIN
        1.       99
        2.       100
        3.       101
        4.       102
        5.       103
      16. 5.3.15 MCAN
        1.       105
        2.       106
        3.       107
        4.       108
      17. 5.3.16 SPI (MCSPI)
        1.       110
        2.       111
        3.       112
        4.       113
        5.       114
      18. 5.3.17 MMC
        1.       116
      19. 5.3.18 Power Supply
        1.       118
      20. 5.3.19 PRU-ICSS
        1.       120
        2.       121
        3.       122
        4.       123
        5.       124
      21. 5.3.20 QSPI
        1.       126
      22. 5.3.21 Reserved and No Connect
        1.       128
      23. 5.3.22 SDFM
        1.       130
        2.       131
      24. 5.3.23 System and Miscellaneous
        1. 5.3.23.1 Boot Mode Configuration
          1.        134
        2. 5.3.23.2 Clocking
          1.        136
          2.        137
          3.        138
        3. 5.3.23.3 SYSTEM
          1.        140
        4. 5.3.23.4 VMON
          1.        142
      25. 5.3.24 UART
        1.       144
        2.       145
        3.       146
        4.       147
        5.       148
        6.       149
      26. 5.3.25 XBAR
        1.       151
    4. 5.4 Pin Connectivity Requirements
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Electrostatic Discharge (ESD) Extended Automotive Ratings
    3. 6.3  Electrostatic Discharge (ESD) Industrial Ratings
    4. 6.4  Power-On Hours (POH) Summary
      1. 6.4.1 Automotive Temperature Profile
    5. 6.5  Recommended Operating Conditions
    6. 6.6  Operating Performance Points
    7. 6.7  Power Consumption Summary
      1. 6.7.1 Power Consumption - Maximum
      2. 6.7.2 Power Consumption - Typical
      3. 6.7.3 Power Consumption - Traction Inverter
    8. 6.8  Electrical Characteristics
      1. 6.8.1 Digital and Analog IO Electrical Characteristics
      2. 6.8.2 Analog-to-Digital Converter (ADC)
      3. 6.8.3 Comparator Subsystem A (CMPSSA)
      4. 6.8.4 Comparator Subsystem B (CMPSSB)
      5. 6.8.5 Digital-to-Analog Converter (DAC)
      6. 6.8.6 Power Management Unit (PMU)
      7. 6.8.7 Safety Comparators
    9. 6.9  VPP Specifications for One-Time Programmable (OTP) eFuses
      1. 6.9.1 VPP Specifications
      2. 6.9.2 Hardware Requirements
      3. 6.9.3 Programming Sequence
      4. 6.9.4 Impact to Your Hardware Warranty
    10. 6.10 Thermal Resistance Characteristics
      1. 6.10.1 Package Thermal Characteristics
    11. 6.11 Timing and Switching Characteristics
      1. 6.11.1 Timing Parameters and Information
      2. 6.11.2 Power Supply Sequencing
        1. 6.11.2.1 Power-On and Reset Sequencing
          1. 6.11.2.1.1 Power Reset Sequence Description
        2. 6.11.2.2 Power-Down Sequencing
      3. 6.11.3 System Timing
        1. 6.11.3.1 System Timing Conditions
        2. 6.11.3.2 Reset Timing
          1. 6.11.3.2.1 PORz Timing Requirements
          2.        190
          3. 6.11.3.2.2 WARMRSTn Switching Characteristics
          4.        192
          5. 6.11.3.2.3 WARMRSTn Timing Requirements
          6.        194
        3. 6.11.3.3 Safety Signal Timing
          1. 6.11.3.3.1 SAFETY_ERRORn Switching Characteristics
          2.        197
      4. 6.11.4 Clock Specifications
        1. 6.11.4.1 Input Clocks / Oscillators
          1. 6.11.4.1.1 Crystal Oscillator (XTAL) Parameters
          2. 6.11.4.1.2 External Clock Characteristics
        2. 6.11.4.2 Clock Timing
          1. 6.11.4.2.1 Clock Timing Requirements
          2.        204
          3. 6.11.4.2.2 Clock Switching Characteristics
          4.        206
      5. 6.11.5 Peripherals
        1. 6.11.5.1  2-port Gigabit Ethernet MAC (CPSW)
          1. 6.11.5.1.1 CPSW MDIO Timing
            1. 6.11.5.1.1.1 CPSW MDIO Timing Conditions
            2. 6.11.5.1.1.2 CPSW MDIO Timing Requirements
            3. 6.11.5.1.1.3 CPSW MDIO Switching Characteristics
            4.         213
          2. 6.11.5.1.2 CPSW RMII Timing
            1. 6.11.5.1.2.1 CPSW RMII Timing Conditions
            2. 6.11.5.1.2.2 CPSW RMII[x]_REFCLK Timing Requirements - RMII Mode
            3.         217
            4. 6.11.5.1.2.3 CPSW RMII[x]_RXD[1:0], RMII[x]_CRS_DV, and RMII[x]_RXER Timing Requirements - RMII Mode
            5.         219
            6. 6.11.5.1.2.4 CPSW RMII[x]_TXD[1:0], and RMII[x]_TXEN Switching Characteristics - RMII Mode
            7.         221
          3. 6.11.5.1.3 CPSW RGMII Timing
            1. 6.11.5.1.3.1 CPSW RGMII Timing Conditions
            2. 6.11.5.1.3.2 CPSW RGMII[x]_RCLK Timing Requirements - RGMII Mode
            3. 6.11.5.1.3.3 CPSW RGMII[x]_RD[3:0], and RGMII[x]_RCTL Timing Requirements
            4.         226
            5. 6.11.5.1.3.4 CPSW RGMII[x]_TCLK Switching Characteristics - RGMII Mode
            6. 6.11.5.1.3.5 CPSW RGMII[x]_TD[3:0], and RGMII[x]_TCTL Switching Characteristics - RGMII Mode
            7.         229
        2. 6.11.5.2  Enhanced Capture (eCAP)
          1. 6.11.5.2.1 ECAP Timing Conditions
          2. 6.11.5.2.2 ECAP Timing Requirements
          3.        233
          4. 6.11.5.2.3 ECAP Switching Characteristics
          5.        235
        3. 6.11.5.3  Enhanced Pulse Width Modulation (ePWM)
          1. 6.11.5.3.1 EPWM Timing Conditions
          2. 6.11.5.3.2 EPWM Timing Requirements
          3.        239
          4. 6.11.5.3.3 EPWM Switching Characteristics
          5.        241
          6.        EPWM Characteristics
        4. 6.11.5.4  Enhanced Quadrature Encoder Pulse (eQEP)
          1. 6.11.5.4.1 EQEP Timing Conditions
          2. 6.11.5.4.2 EQEP Timing Requirements
          3.        246
          4. 6.11.5.4.3 EQEP Switching Characteristics
        5. 6.11.5.5  Fast Serial Interface (FSI)
          1. 6.11.5.5.1 FSI Timing Conditions
          2. 6.11.5.5.2 FSIRX Timing Requirements
          3.        251
          4. 6.11.5.5.3 FSIRX Switching Characteristics
          5. 6.11.5.5.4 FSITX Switching Characteristics
          6.        254
          7. 6.11.5.5.5 FSITX SPI Signaling Mode Switching Characteristics
          8.        256
        6. 6.11.5.6  General Purpose Input/Output (GPIO)
          1. 6.11.5.6.1 GPIO Timing Conditions
          2. 6.11.5.6.2 GPIO Timing Requirements
          3. 6.11.5.6.3 GPIO Switching Characteristics
        7. 6.11.5.7  General Purpose Memory Controller (GPMC)
          1. 6.11.5.7.1 GPMC Timing Conditions
          2. 6.11.5.7.2 GPMC/NOR Flash Timing Requirements - Synchronous Mode 100MHz
          3. 6.11.5.7.3 GPMC/NOR Flash Switching Characteristics - Synchronous Mode 100MHz
          4.        265
          5. 6.11.5.7.4 GPMC/NOR Flash Timing Requirements - Asynchronous Mode 100MHz
          6. 6.11.5.7.5 GPMC/NOR Flash Switching Characteristics - Asynchronous Mode 100MHz
          7.        268
          8. 6.11.5.7.6 GPMC/NAND Flash Timing Requirements - Asynchronous Mode 100MHz
          9. 6.11.5.7.7 GPMC/NAND Flash Switching Characteristics - Asynchronous Mode 100MHz
          10.        271
        8. 6.11.5.8  Inter-Integrated Circuit (I2C)
          1. 6.11.5.8.1 I2C
        9. 6.11.5.9  Local Interconnect Network (LIN)
          1. 6.11.5.9.1 LIN Timing Conditions
          2. 6.11.5.9.2 LIN Timing Requirements
          3. 6.11.5.9.3 LIN Switching Characteristics
        10. 6.11.5.10 Modular Controller Area Network (MCAN)
          1. 6.11.5.10.1 MCAN Timing Conditions
          2. 6.11.5.10.2 MCAN Switching Characteristics
        11. 6.11.5.11 Serial Peripheral Interface (SPI)
          1. 6.11.5.11.1 SPI Timing Conditions
          2. 6.11.5.11.2 SPI Controller Mode Timing Requirements
          3.        284
          4. 6.11.5.11.3 SPI Controller Mode Switching Characteristics (Clock Phase = 0)
          5.        286
          6. 6.11.5.11.4 SPI Peripheral Mode Timing Requirements
          7.        288
          8. 6.11.5.11.5 SPI Peripheral Mode Switching Characteristics
          9.        290
        12. 6.11.5.12 Multi-Media Card/Secure Digital (MMCSD)
          1. 6.11.5.12.1 MMC Timing Conditions
          2. 6.11.5.12.2 MMC Timing Requirements - SD Card Default Speed Mode
          3.        294
          4. 6.11.5.12.3 MMC Switching Characteristics - SD Card Default Speed Mode
          5.        296
          6. 6.11.5.12.4 MMC Timing Requirements - SD Card High Speed Mode
          7.        298
          8. 6.11.5.12.5 MMC Switching Characteristics - SD Card High Speed Mode
          9.        300
        13. 6.11.5.13 Quad Serial Peripheral Interface (QSPI)
          1. 6.11.5.13.1 QSPI Timing Conditions
          2. 6.11.5.13.2 QSPI Timing Requirements
          3.        304
          4. 6.11.5.13.3 QSPI Switching Characteristics
          5.        306
        14. 6.11.5.14 Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS)
          1. 6.11.5.14.1 PRU-ICSS Programmable Real-Time Unit (PRU)
            1. 6.11.5.14.1.1 PRU-ICSS PRU Timing Conditions
            2. 6.11.5.14.1.2 PRU-ICSS PRU Switching Characteristics - Direct Output Mode
            3.         311
            4. 6.11.5.14.1.3 PRU-ICSS PRU Timing Requirements - Parallel Capture Mode
            5.         313
            6. 6.11.5.14.1.4 PRU-ICSS PRU Timing Requirements - Shift In Mode
            7.         315
            8. 6.11.5.14.1.5 PRU-ICSS PRU Switching Characteristics - Shift Out Mode
            9.         317
          2. 6.11.5.14.2 PRU-ICSS PRU Sigma Delta and Peripheral Interface
            1. 6.11.5.14.2.1 PRU-ICSS PRU Sigma Delta and Peripheral Interface Timing Conditions
            2. 6.11.5.14.2.2 PRU-ICSS PRU Timing Requirements - Sigma Delta Mode
            3.         321
            4. 6.11.5.14.2.3 PRU-ICSS PRU Timing Requirements - Peripheral Interface Mode
            5.         323
            6. 6.11.5.14.2.4 PRU-ICSS PRU Switching Characteristics - Peripheral Interface Mode
            7.         325
          3. 6.11.5.14.3 PRU-ICSS Pulse Width Modulation (PWM)
            1. 6.11.5.14.3.1 PRU-ICSS PWM Timing Conditions
            2. 6.11.5.14.3.2 PRU-ICSS PWM Switching Characteristics
            3.         329
          4. 6.11.5.14.4 PRU-ICSS Industrial Ethernet Peripheral (IEP)
            1. 6.11.5.14.4.1 PRU-ICSS IEP Timing Conditions
            2. 6.11.5.14.4.2 PRU-ICSS IEP Timing Requirements - Input Validated with SYNCx
            3.         333
            4. 6.11.5.14.4.3 PRU-ICSS IEP Timing Requirements - Digital IOs
            5.         335
            6. 6.11.5.14.4.4 PRU-ICSS IEP Timing Requirements - LATCHx_IN
            7.         337
          5. 6.11.5.14.5 PRU-ICSS Universal Asynchronous Receiver Transmitter (UART)
            1. 6.11.5.14.5.1 PRU-ICSS UART Timing Conditions
            2. 6.11.5.14.5.2 PRU-ICSS UART Timing Requirements
            3. 6.11.5.14.5.3 PRU-ICSS UART Switching Characteristics
            4.         342
          6. 6.11.5.14.6 PRU-ICSS Enhanced Capture Peripheral (ECAP)
            1. 6.11.5.14.6.1 PRU-ICSS ECAP Timing Conditions
            2. 6.11.5.14.6.2 PRU-ICSS ECAP Timing Requirements
            3.         346
            4. 6.11.5.14.6.3 PRU-ICSS ECAP Switching Characteristics
            5.         348
          7. 6.11.5.14.7 PRU-ICSS MDIO and MII
            1. 6.11.5.14.7.1 PRU-ICSS MDIO Timing
              1. 6.11.5.14.7.1.1 PRU-ICSS MDIO Timing Conditions
              2. 6.11.5.14.7.1.2 PRU-ICSS MDIO Timing Requirements
              3. 6.11.5.14.7.1.3 PRU-ICSS MDIO Switching Characteristics
              4.          354
            2. 6.11.5.14.7.2 PRU-ICSS MII Timing
              1. 6.11.5.14.7.2.1 PRU-ICSS MII Timing Conditions
              2. 6.11.5.14.7.2.2 PRU-ICSS MII Timing Requirements - MII[x]_RX_CLK
              3.          358
              4. 6.11.5.14.7.2.3 PRU-ICSS MII Timing Requirements - MII[x]_RXD[3:0], MII[x]_RX_DV, and MII[x]_RX_ER
              5.          360
              6. 6.11.5.14.7.2.4 PRU-ICSS MII Switching Characteristics - MII[x]_TX_CLK
              7.          362
              8. 6.11.5.14.7.2.5 PRU-ICSS MII Switching Characteristics - MII[x]_TXD[3:0] and MII[x]_TXEN
              9.          364
        15. 6.11.5.15 Sigma Delta Filter Module (SDFM)
          1. 6.11.5.15.1 SDFM Timing Conditions
          2. 6.11.5.15.2 SDFM Switching Characteristics
        16. 6.11.5.16 Universal Asynchronous Receiver/Transmitter (UART)
          1. 6.11.5.16.1 UART Timing Conditions
          2. 6.11.5.16.2 UART Timing Requirements
          3. 6.11.5.16.3 UART Switching Characteristics
          4.        372
      6. 6.11.6 Emulation and Debug
        1. 6.11.6.1 JTAG
          1. 6.11.6.1.1 JTAG Timing Conditions
          2. 6.11.6.1.2 JTAG Timing Requirements
          3. 6.11.6.1.3 JTAG Switching Characteristics
          4.        378
        2. 6.11.6.2 Trace
          1. 6.11.6.2.1 Debug Trace Timing Conditions
          2. 6.11.6.2.2 Debug Trace Switching Characteristics
          3.        382
    12. 6.12 Decoupling Capacitor Requirements
      1. 6.12.1 Decoupling Capacitor Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Processor Subsystems
      1. 7.2.1 Arm Cortex-R5F Subsystem
  9. 8 Applications, Implementation, and Layout
    1. 8.1 Device Connection and Layout Fundamentals
      1. 8.1.1 External Oscillator
      2. 8.1.2 JTAG, EMU, and TRACE
      3. 8.1.3 Hardware Design Guide
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
      1. 9.1.1 Standard Package Symbolization
      2. 9.1.2 Device Naming Convention
    2. 9.2 Tools and Software
    3. 9.3 Documentation Support
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ZCZ|324
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 5-1 Pin Attributes (ZCZ Package)
BALL
NUMBER [1]		 BALL NAME [2]/
IOMUX
REGISTER [15]/
ADDRESS [16]/
DEFAULT VALUE [17]		 SIGNAL NAME [3] MUX
MODE [4]		 TYPE [5] BALL
STATE
DURING
RESET
RX/TX/PULL [7]		 BALL
STATE
AFTER
RESET
RX/TX/PULL [8]		 MUX
MODE
AFTER
RESET [9]		 IO
VOLTAGE [10]		 POWER [11] HYS [12] BUFFER
TYPE [14]		 PULL
TYPE [13]
V15 ADC0_AIN0 ADC0_AIN0 I 3.3V VDDA_CIO AnalogCIO
U15 ADC0_AIN1 ADC0_AIN1 I 3.3V VDDA_CIO AnalogCIO
T14 ADC0_AIN2 ADC0_AIN2 I 3.3V VDDA_CIO AnalogCIO
U14 ADC0_AIN3 ADC0_AIN3 I 3.3V VDDA_CIO AnalogCIO
U13 ADC0_AIN4 ADC0_AIN4 I 3.3V VDDA_CIO AnalogCIO
R14 ADC0_AIN5 ADC0_AIN5 I 3.3V VDDA_CIO AnalogCIO
T11 ADC1_AIN0 ADC1_AIN0 I 3.3V VDDA_CIO AnalogCIO
U11 ADC1_AIN1 ADC1_AIN1 I 3.3V VDDA_CIO AnalogCIO
T12 ADC1_AIN2 ADC1_AIN2 I 3.3V VDDA_CIO AnalogCIO
V12 ADC1_AIN3 ADC1_AIN3 I 3.3V VDDA_CIO AnalogCIO
U12 ADC1_AIN4 ADC1_AIN4 I 3.3V VDDA_CIO AnalogCIO
R12 ADC1_AIN5 ADC1_AIN5 I 3.3V VDDA_CIO AnalogCIO
R10 ADC2_AIN0 ADC2_AIN0 I 3.3V VDDA_CIO AnalogCIO
T10 ADC2_AIN1 ADC2_AIN1 I 3.3V VDDA_CIO AnalogCIO
U10 ADC2_AIN2 ADC2_AIN2 I 3.3V VDDA_CIO AnalogCIO
T9 ADC2_AIN3 ADC2_AIN3 I 3.3V VDDA_CIO AnalogCIO
V9 ADC2_AIN4 ADC2_AIN4 I 3.3V VDDA_CIO AnalogCIO
T8 ADC2_AIN5 ADC2_AIN5 I 3.3V VDDA_CIO AnalogCIO
U7 ADC3_AIN0 ADC3_AIN0 I 3.3V VDDA_CIO AnalogCIO
U8 ADC3_AIN1 ADC3_AIN1 I 3.3V VDDA_CIO AnalogCIO
T7 ADC3_AIN2 ADC3_AIN2 I 3.3V VDDA_CIO AnalogCIO
R7 ADC3_AIN3 ADC3_AIN3 I 3.3V VDDA_CIO AnalogCIO
V8 ADC3_AIN4 ADC3_AIN4 I 3.3V VDDA_CIO AnalogCIO
U9 ADC3_AIN5 ADC3_AIN5 I 3.3V VDDA_CIO AnalogCIO
U6 ADC4_AIN0 ADC4_AIN0 I 3.3V VDDA_CIO AnalogCIO
V5 ADC4_AIN1 ADC4_AIN1 I 3.3V VDDA_CIO AnalogCIO
V4 ADC4_AIN2 ADC4_AIN2 I 3.3V VDDA_CIO AnalogCIO
U5 ADC4_AIN3 ADC4_AIN3 I 3.3V VDDA_CIO AnalogCIO
V3 ADC4_AIN4 ADC4_AIN4 I 3.3V VDDA_CIO AnalogCIO
U4 ADC4_AIN5 ADC4_AIN5 I 3.3V VDDA_CIO AnalogCIO
U16 ADC_CAL0 ADC_CAL0 I 3.3V VDDA_CIO AnalogCIO
T15 ADC_CAL1 ADC_CAL1 I 3.3V VDDA_CIO AnalogCIO
V14 ADC_VREFHI_G0 ADC_VREFHI_G0 A 1.8V VDDA_CIO AnalogCIO
V10 ADC_VREFHI_G1 ADC_VREFHI_G1 A 1.8V VDDA_CIO AnalogCIO
V6 ADC_VREFHI_G2 ADC_VREFHI_G2 A 1.8V VDDA_CIO AnalogCIO
V13 ADC_VREFLO_G0 ADC_VREFLO_G0 A 1.8V VDDA_CIO AnalogCIO
V11 ADC_VREFLO_G1 ADC_VREFLO_G1 A 1.8V VDDA_CIO AnalogCIO
V7 ADC_VREFLO_G2 ADC_VREFLO_G2 A 1.8V VDDA_CIO AnalogCIO
M2 CLKOUT0CLKOUT0_CFG_REG
0x5310 0228
0x0000 0570 		CLKOUT0 0 O Off / Off / Off Off / SS / Off 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO138 7 IO
T5 DAC_OUT DAC_OUT O 3.3V VDDA_CIO AnalogCIO
T13 DAC_VREF0 DAC_VREF0 A 3.3V VDDA_CIO AnalogCIO
T6 DAC_VREF1 DAC_VREF1 A 3.3V VDDA_CIO AnalogCIO
B2 EPWM0_AEPWM0_A_CFG_REG
0x5310 00AC
0x0000 05F7 		EPWM0_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO43 7 IO
B1 EPWM0_BEPWM0_B_CFG_REG
0x5310 00B0
0x0000 05F7 		EPWM0_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO44 7 IO
D3 EPWM1_AEPWM1_A_CFG_REG
0x5310 00B4
0x0000 05F7 		EPWM1_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO45 7 IO
D2 EPWM1_BEPWM1_B_CFG_REG
0x5310 00B8
0x0000 05F7 		EPWM1_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO46 7 IO
C2 EPWM2_AEPWM2_A_CFG_REG
0x5310 00BC
0x0000 05F7 		EPWM2_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO47 7 IO
C1 EPWM2_BEPWM2_B_CFG_REG
0x5310 00C0
0x0000 05F7 		EPWM2_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO48 7 IO
E2 EPWM3_AEPWM3_A_CFG_REG
0x5310 00C4
0x0000 05F7 		EPWM3_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO49 7 IO
E3 EPWM3_BEPWM3_B_CFG_REG
0x5310 00C8
0x0000 05F7 		EPWM3_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO50 7 IO
D1 EPWM4_AEPWM4_A_CFG_REG
0x5310 00CC
0x0000 05F7 		EPWM4_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO51 7 IO
E4 EPWM4_BEPWM4_B_CFG_REG
0x5310 00D0
0x0000 05F7 		EPWM4_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX1_CLK 6 O
GPIO52 7 IO
F2 EPWM5_AEPWM5_A_CFG_REG
0x5310 00D4
0x0000 05F7 		EPWM5_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX1_DATA0 6 O
GPIO53 7 IO
G2 EPWM5_BEPWM5_B_CFG_REG
0x5310 00D8
0x0000 05F7 		EPWM5_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX1_DATA1 6 O
GPIO54 7 IO
E1 EPWM6_AEPWM6_A_CFG_REG
0x5310 00DC
0x0000 05F7 		EPWM6_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX1_CLK 6 I
GPIO55 7 IO
F3 EPWM6_BEPWM6_B_CFG_REG
0x5310 00E0
0x0000 05F7 		EPWM6_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX1_DATA0 6 I
GPIO56 7 IO
F4 EPWM7_AEPWM7_A_CFG_REG
0x5310 00E4
0x0000 05F7 		EPWM7_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX1_DATA1 6 I
GPIO57 7 IO
F1 EPWM7_BEPWM7_B_CFG_REG
0x5310 00E8
0x0000 05F7 		EPWM7_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO58 7 IO
G3 EPWM8_AEPWM8_A_CFG_REG
0x5310 00EC
0x0000 05F7 		EPWM8_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART4_TXD 1 O
I2C3_SDA 2 IOD
FSITX2_CLK 6 O
GPIO59 7 IO
H2 EPWM8_BEPWM8_B_CFG_REG
0x5310 00F0
0x0000 05F7 		EPWM8_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART4_RXD 1 I
I2C3_SCL 2 IOD
FSITX2_DATA0 6 O
GPIO60 7 IO
G1 EPWM9_AEPWM9_A_CFG_REG
0x5310 00F4
0x0000 05F7 		EPWM9_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX2_DATA1 6 O
GPIO61 7 IO
J2 EPWM9_BEPWM9_B_CFG_REG
0x5310 00F8
0x0000 05F7 		EPWM9_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_RTSn 1 O
FSIRX2_CLK 6 I
GPIO62 7 IO
G4 EPWM10_AEPWM10_A_CFG_REG
0x5310 00FC
0x0000 05F7 		EPWM10_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_CTSn 1 I
FSIRX2_DATA0 6 I
GPIO63 7 IO
J3 EPWM10_BEPWM10_B_CFG_REG
0x5310 0100
0x0000 05F7 		EPWM10_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_RTSn 1 O
FSIRX2_DATA1 6 I
GPIO64 7 IO
H1 EPWM11_AEPWM11_A_CFG_REG
0x5310 0104
0x0000 05F7 		EPWM11_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_CTSn 1 I
GPMC0_CLKLB 6 IO
GPIO65 7 IO
J1 EPWM11_BEPWM11_B_CFG_REG
0x5310 0108
0x0000 05F7 		EPWM11_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_RTSn 1 O
GPMC0_OEn_REn 6 O
GPIO66 7 IO
K2 EPWM12_AEPWM12_A_CFG_REG
0x5310 010C
0x0000 05F7 		EPWM12_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_CTSn 1 I
SPI4_CS1 2 IO
GPMC0_WEn 6 O
GPIO67 7 IO
J4 EPWM12_BEPWM12_B_CFG_REG
0x5310 0110
0x0000 05F7 		EPWM12_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_DCDn 1 I
GPMC0_CSn0 6 O
GPIO68 7 IO
K4 EPWM13_AEPWM13_A_CFG_REG
0x5310 0114
0x0000 05F7 		EPWM13_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_RIn 1 I
GPMC0_AD0 6 IO
GPIO69 7 IO
K3 EPWM13_BEPWM13_B_CFG_REG
0x5310 0118
0x0000 05F7 		EPWM13_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_DTRn 1 O
GPMC0_AD1 6 IO
GPIO70 7 IO
V17 EPWM14_AEPWM14_A_CFG_REG
0x5310 011C
0x0000 05F7 		EPWM14_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_DSRn 1 I
GPMC0_AD2 6 IO
GPIO71 7 IO
T16 EPWM14_BEPWM14_B_CFG_REG
0x5310 0120
0x0000 05F7 		EPWM14_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
MII1_RX_ER 2 I
GPMC0_AD3 6 IO
GPIO72 7 IO
P15 EPWM15_AEPWM15_A_CFG_REG
0x5310 0124
0x0000 05F7 		EPWM15_A 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_TXD 1 O
MII1_COL 2 I
GPMC0_AD4 6 IO
GPIO73 7 IO
R16 EPWM15_BEPWM15_B_CFG_REG
0x5310 0128
0x0000 05F7 		EPWM15_B 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_RXD 1 I
MII1_CRS 2 I
GPMC0_AD5 6 IO
GPIO74 7 IO
B14 EQEP0_AEQEP0_A_CFG_REG
0x5310 0208
0x0000 05F7 		UART4_RTSn 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_CLK 3 IO
GPIO130 7 IO
EQEP0_A 8 I
SDFM1_CLK0 9 I
A14 EQEP0_BEQEP0_B_CFG_REG
0x5310 020C
0x0000 05F7 		UART4_CTSn 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_CS0 3 IO
GPIO131 7 IO
EQEP0_B 8 I
SDFM1_D0 9 I
D11 EQEP0_INDEXEQEP0_INDEX_CFG_REG
0x5310 0214
0x0000 05F7 		UART4_RXD 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN4_RXD 1 IO
SPI4_D1 3 IO
GPIO133 7 IO
EQEP0_INDEX 8 IO
SDFM1_D1 9 I
C12 EQEP0_STROBEEQEP0_STROBE_CFG_REG
0x5310 0210
0x0000 05F7 		UART4_TXD 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN4_TXD 1 IO
SPI4_D0 3 IO
GPIO132 7 IO
EQEP0_STROBE 8 IO
SDFM1_CLK1 9 I
P2 EXT_REFCLK0EXT_REFCLK0_CFG_REG
0x5310 01E4
0x0000 05F7 		EXT_REFCLK0 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
XBAROUT15 5 O
GPIO121 7 IO
EQEP1_INDEX 9 IO
A13 I2C0_SCLI2C0_SCL_CFG_REG
0x5310 021C
0x0000 05F7 		I2C0_SCL 0 IOD Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes I2C OD
GPIO135 7 IOD
EQEP2_B 8 ID
SDFM1_CLK3 9 ID
B13 I2C0_SDAI2C0_SDA_CFG_REG
0x5310 0218
0x0000 05F7 		I2C0_SDA 0 IOD Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes I2C OD
GPIO134 7 IOD
EQEP2_A 8 ID
SDFM1_CLK2 9 ID
D7 I2C1_SCLI2C1_SCL_CFG_REG
0x5310 005C
0x0000 05F7 		I2C1_SCL 0 IOD Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI3_CS0 2 IO
XBAROUT7 5 O
GPIO23 7 IO
C8 I2C1_SDAI2C1_SDA_CFG_REG
0x5310 0060
0x0000 05F7 		I2C1_SDA 0 IOD Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI3_CLK 2 IO
XBAROUT8 5 O
GPIO24 7 IO
A9 LIN1_RXDLIN1_RXD_CFG_REG
0x5310 004C
0x0000 05F7 		LIN1_RXD 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_RXD 1 I
SPI2_CS0 2 IO
XBAROUT5 5 O
GPIO19 7 IO
B9 LIN1_TXDLIN1_TXD_CFG_REG
0x5310 0050
0x0000 05F7 		LIN1_TXD 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_TXD 1 O
SPI2_CLK 2 IO
XBAROUT6 5 O
GPIO20 7 IO
B8 LIN2_RXDLIN2_RXD_CFG_REG
0x5310 0054
0x0000 05F7 		LIN2_RXD 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_RXD 1 I
SPI2_D0 2 IO
GPIO21 7 IO
A8 LIN2_TXDLIN2_TXD_CFG_REG
0x5310 0058
0x0000 05F7 		LIN2_TXD 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_TXD 1 O
SPI2_D1 2 IO
GPIO22 7 IO
M1 MCAN0_RXMCAN0_RX_CFG_REG
0x5310 001C
0x0000 05F7 		MCAN0_RX 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_CS0 1 IO
GPIO7 7 IO
L1 MCAN0_TXMCAN0_TX_CFG_REG
0x5310 0020
0x0000 05F7 		MCAN0_TX 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_CLK 1 IO
GPIO8 7 IO
L2 MCAN1_RXMCAN1_RX_CFG_REG
0x5310 0024
0x0000 05F7 		MCAN1_RX 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_D0 1 IO
GPIO9 7 IO
K1 MCAN1_TXMCAN1_TX_CFG_REG
0x5310 0028
0x0000 05F7 		MCAN1_TX 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
SPI4_D1 1 IO
GPIO10 7 IO
A12 MCAN2_RXMCAN2_RX_CFG_REG
0x5310 0224
0x0000 05F7 		MCAN2_RX 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_RTSn 1 O
GPIO137 7 IO
EQEP2_INDEX 8 IO
SDFM1_D3 9 I
B12 MCAN2_TXMCAN2_TX_CFG_REG
0x5310 0220
0x0000 05F7 		MCAN2_TX 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART1_RTSn 1 O
GPIO136 7 IO
EQEP2_STROBE 8 IO
SDFM1_D2 9 I
M17 MDIO0_MDCMDIO0_MDC_CFG_REG
0x5310 00A8
0x0000 05F7 		MDIO0_MDC 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO42 7 IO
N16 MDIO0_MDIOMDIO0_MDIO_CFG_REG
0x5310 00A4
0x0000 05F7 		MDIO0_MDIO 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO41 7 IO
A5 MMC0_CDMMC0_CD_CFG_REG
0x5310 0150
0x0000 05F7 		MMC0_CD 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART0_CTSn 1 I
I2C2_SDA 2 IOD
EPWM20_B 5 O
GPMC0_AD15 6 IO
GPIO84 7 IO
SDFM1_D3 8 I
B6 MMC0_CLKMMC0_CLK_CFG_REG
0x5310 0134
0x0000 05F7 		MMC0_CLK 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART0_RXD 1 I
LIN0_RXD 2 IO
EPWM17_A 5 O
GPMC0_AD8 6 IO
GPIO77 7 IO
SDFM1_CLK0 8 I
A4 MMC0_CMDMMC0_CMD_CFG_REG
0x5310 0138
0x0000 05F7 		MMC0_CMD 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART0_TXD 1 O
LIN0_TXD 2 IO
EPWM17_B 5 O
GPMC0_AD9 6 IO
GPIO78 7 IO
SDFM1_D0 8 I
C6 MMC0_WPMMC0_WP_CFG_REG
0x5310 014C
0x0000 05F7 		MMC0_WP 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART0_RTSn 1 O
I2C2_SCL 2 IOD
EPWM20_A 5 O
GPMC0_AD14 6 IO
GPIO83 7 IO
SDFM1_CLK3 8 I
B5 MMC0_D0MMC0_D0_CFG_REG
0x5310 013C
0x0000 05F7 		MMC0_D0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_RXD 1 I
I2C1_SCL 2 IOD
EPWM18_A 5 O
GPMC0_AD10 6 IO
GPIO79 7 IO
SDFM1_CLK1 8 I
B4 MMC0_D1MMC0_D1_CFG_REG
0x5310 0140
0x0000 05F7 		MMC0_D1 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
EPWM18_B 5 O
GPMC0_AD11 6 IO
GPIO80 7 IO
SDFM1_D1 8 I
A3 MMC0_D2MMC0_D2_CFG_REG
0x5310 0144
0x0000 05F7 		MMC0_D2 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART2_TXD 1 O
I2C1_SDA 2 IOD
EPWM19_A 5 O
GPMC0_AD12 6 IO
GPIO81 7 IO
SDFM1_CLK2 8 I
A2 MMC0_D3MMC0_D3_CFG_REG
0x5310 0148
0x0000 05F7 		MMC0_D3 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_RTSn 1 O
EPWM19_B 5 O
GPMC0_AD13 6 IO
GPIO82 7 IO
SDFM1_D2 8 I
R2 PORz PORz I 0 3.3V VDDSHV0 Yes RESET
L18 PR0_MDIO0_MDCPR0_MDIO0_MDC_CFG_REG
0x5310 0158
0x0000 05F7 		PR0_MDIO0_MDC 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
EPWM21_B 5 O
GPMC0_CSn3 6 O
GPIO86 7 IO
L17 PR0_MDIO0_MDIOPR0_MDIO0_MDIO_CFG_REG
0x5310 0154
0x0000 05F7 		PR0_MDIO0_MDIO 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
EPWM21_A 5 O
GPMC0_CSn2 6 O
GPIO85 7 IO
K17 PR0_PRU0_GPIO0PR0_PRU0_GPIO0_CFG_REG
0x5310 0174
0x0000 05F7 		PR0_PRU0_GPIO0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_RXD0 2 I
RGMII2_RD0 3 I
MII2_RXD0 4 I
EPWM25_A 5 O
GPMC0_A1 6 O
GPIO93 7 IO
K18 PR0_PRU0_GPIO1PR0_PRU0_GPIO1_CFG_REG
0x5310 0178
0x0000 05F7 		PR0_PRU0_GPIO1 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_RXD1 2 I
RGMII2_RD1 3 I
MII2_RXD1 4 I
EPWM25_B 5 O
GPMC0_A2 6 O
GPIO94 7 IO
J18 PR0_PRU0_GPIO2PR0_PRU0_GPIO2_CFG_REG
0x5310 017C
0x0000 05F7 		PR0_PRU0_GPIO2 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_RD2 3 I
MII2_RXD2 4 I
EPWM26_A 5 O
GPMC0_A3 6 O
GPIO95 7 IO
J17 PR0_PRU0_GPIO3PR0_PRU0_GPIO3_CFG_REG
0x5310 0180
0x0000 05F7 		PR0_PRU0_GPIO3 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_RD3 3 I
MII2_RXD3 4 I
EPWM26_B 5 O
GPMC0_A4 6 O
GPIO96 7 IO
K16 PR0_PRU0_GPIO4PR0_PRU0_GPIO4_CFG_REG
0x5310 0170
0x0000 05F7 		PR0_PRU0_GPIO4 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_RX_CTL 3 I
MII2_RXDV 4 I
EPWM24_B 5 O
GPMC0_A0 6 O
GPIO92 7 IO
G17 PR0_PRU0_GPIO5PR0_PRU0_GPIO5_CFG_REG
0x5310 015C
0x0000 05F7 		PR0_PRU0_GPIO5 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_RX_ER 2 I
MII2_RX_ER 4 I
EPWM22_A 5 O
GPMC0_DIR 6 O
GPIO87 7 IO
K15 PR0_PRU0_GPIO6PR0_PRU0_GPIO6_CFG_REG
0x5310 016C
0x0000 05F7 		PR0_PRU0_GPIO6 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_REF_CLK 2 IO
RGMII2_RXC 3 I
MII2_RXCLK 4 I
EPWM24_A 5 O
GPMC0_CSn1 6 O
GPIO91 7 IO
G15 PR0_PRU0_GPIO8PR0_PRU0_GPIO8_CFG_REG
0x5310 0168
0x0000 05F7 		PR0_PRU0_GPIO8 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
EPWM23_B 5 O
GPMC0_WPn 6 O
GPIO90 7 IO
F17 PR0_PRU0_GPIO9PR0_PRU0_GPIO9_CFG_REG
0x5310 0160
0x0000 05F7 		PR0_PRU0_GPIO9 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
PR0_UART0_CTSn 3 I
MII2_COL 4 I
EPWM22_B 5 O
GPMC0_CLK 6 IO
GPIO88 7 IO
G18 PR0_PRU0_GPIO10PR0_PRU0_GPIO10_CFG_REG
0x5310 0164
0x0000 05F7 		PR0_PRU0_GPIO10 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_CRS_DV 2 I
PR0_UART0_RTSn 3 O
MII2_CRS 4 I
EPWM23_A 5 O
GPMC0_WAIT0 6 I
GPIO89 7 IO
M16 PR0_PRU0_GPIO11PR0_PRU0_GPIO11_CFG_REG
0x5310 018C
0x0000 05F7 		PR0_PRU0_GPIO11 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_TXD0 2 O
RGMII2_TD0 3 O
MII2_TXD0 4 O
EPWM28_A 5 O
GPMC0_A7 6 O
GPIO99 7 IO
M15 PR0_PRU0_GPIO12PR0_PRU0_GPIO12_CFG_REG
0x5310 0190
0x0000 05F7 		PR0_PRU0_GPIO12 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_TXD1 2 O
RGMII2_TD1 3 O
MII2_TXD1 4 O
EPWM28_B 5 O
GPMC0_A8 6 O
GPIO100 7 IO
H17 PR0_PRU0_GPIO13PR0_PRU0_GPIO13_CFG_REG
0x5310 0194
0x0000 05F7 		PR0_PRU0_GPIO13 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_TD2 3 O
MII2_TXD2 4 O
EPWM29_A 5 O
GPMC0_A9 6 O
GPIO101 7 IO
H16 PR0_PRU0_GPIO14PR0_PRU0_GPIO14_CFG_REG
0x5310 0198
0x0000 05F7 		PR0_PRU0_GPIO14 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_TD3 3 O
MII2_TXD3 4 O
EPWM29_B 5 O
GPMC0_A10 6 O
GPIO102 7 IO
L16 PR0_PRU0_GPIO15PR0_PRU0_GPIO15_CFG_REG
0x5310 0188
0x0000 05F7 		PR0_PRU0_GPIO15 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII2_TX_EN 2 O
RGMII2_TX_CTL 3 O
MII2_TX_EN 4 O
EPWM27_B 5 O
GPMC0_A6 6 O
GPIO98 7 IO
H18 PR0_PRU0_GPIO16PR0_PRU0_GPIO16_CFG_REG
0x5310 0184
0x0000 05F7 		PR0_PRU0_GPIO16 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RGMII2_TXC 3 O
MII2_TXCLK 4 I
EPWM27_A 5 O
GPMC0_A5 6 O
GPIO97 7 IO
F18 PR0_PRU1_GPIO0PR0_PRU1_GPIO0_CFG_REG
0x5310 01B4
0x0000 05F7 		PR0_PRU1_GPIO0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX2_DATA1 3 O
TRC_DATA6 4 O
GPMC0_A13 6 O
GPIO109 7 IO
G16 PR0_PRU1_GPIO1PR0_PRU1_GPIO1_CFG_REG
0x5310 01B8
0x0000 05F7 		PR0_PRU1_GPIO1 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX2_CLK 3 I
TRC_DATA7 4 O
GPMC0_A14 6 O
GPIO110 7 IO
E17 PR0_PRU1_GPIO2PR0_PRU1_GPIO2_CFG_REG
0x5310 01BC
0x0000 05F7 		PR0_PRU1_GPIO2 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX2_DATA0 3 I
TRC_DATA8 4 O
GPMC0_A15 6 O
GPIO111 7 IO
E18 PR0_PRU1_GPIO3PR0_PRU1_GPIO3_CFG_REG
0x5310 01C0
0x0000 05F7 		PR0_PRU1_GPIO3 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX2_DATA1 3 I
TRC_DATA9 4 O
GPMC0_A16 6 O
GPIO112 7 IO
F16 PR0_PRU1_GPIO4PR0_PRU1_GPIO4_CFG_REG
0x5310 01B0
0x0000 05F7 		PR0_PRU1_GPIO4 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX2_DATA0 3 O
TRC_DATA5 4 O
GPMC0_A12 6 O
GPIO108 7 IO
F15 PR0_PRU1_GPIO5PR0_PRU1_GPIO5_CFG_REG
0x5310 019C
0x0000 05F7 		PR0_PRU1_GPIO5 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
TRC_DATA0 4 O
EPWM30_A 5 O
GPMC0_OEn_REn 6 O
GPIO103 7 IO
E16 PR0_PRU1_GPIO6PR0_PRU1_GPIO6_CFG_REG
0x5310 01AC
0x0000 05F7 		PR0_PRU1_GPIO6 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX2_CLK 3 O
TRC_DATA4 4 O
GPMC0_A11 6 O
GPIO107 7 IO
D18 PR0_PRU1_GPIO8PR0_PRU1_GPIO8_CFG_REG
0x5310 01A8
0x0000 05F7 		PR0_PRU1_GPIO8 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
TRC_DATA3 4 O
EPWM31_B 5 O
GPMC0_WEn 6 O
GPIO106 7 IO
C18 PR0_PRU1_GPIO9PR0_PRU1_GPIO9_CFG_REG
0x5310 01A0
0x0000 05F7 		PR0_PRU1_GPIO9 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
PR0_UART0_RXD 3 I
TRC_DATA1 4 O
EPWM30_B 5 O
GPMC0_BE0n_CLE 6 O
GPIO104 7 IO
D17 PR0_PRU1_GPIO10PR0_PRU1_GPIO10_CFG_REG
0x5310 01A4
0x0000 05F7 		PR0_PRU1_GPIO10 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
PR0_UART0_TXD 3 O
TRC_DATA2 4 O
EPWM31_A 5 O
GPMC0_BE1n 6 O
GPIO105 7 IO
B18 PR0_PRU1_GPIO11PR0_PRU1_GPIO11_CFG_REG
0x5310 01CC
0x0000 05F7 		PR0_PRU1_GPIO11 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX3_DATA1 3 O
TRC_DATA12 4 O
GPMC0_A19 6 O
GPIO115 7 IO
B17 PR0_PRU1_GPIO12PR0_PRU1_GPIO12_CFG_REG
0x5310 01D0
0x0000 05F7 		PR0_PRU1_GPIO12 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX3_CLK 3 I
TRC_DATA13 4 O
GPMC0_A20 6 O
GPIO116 7 IO
D16 PR0_PRU1_GPIO13PR0_PRU1_GPIO13_CFG_REG
0x5310 01D4
0x0000 05F7 		PR0_PRU1_GPIO13 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX3_DATA0 3 I
TRC_DATA14 4 O
XBAROUT11 5 O
GPMC0_A21 6 O
GPIO117 7 IO
C17 PR0_PRU1_GPIO14PR0_PRU1_GPIO14_CFG_REG
0x5310 01D8
0x0000 05F7 		PR0_PRU1_GPIO14 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSIRX3_DATA1 3 I
TRC_DATA15 4 O
XBAROUT12 5 O
GPMC0_CSn0 6 O
GPIO118 7 IO
A17 PR0_PRU1_GPIO15PR0_PRU1_GPIO15_CFG_REG
0x5310 01C8
0x0000 05F7 		PR0_PRU1_GPIO15 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX3_DATA0 3 O
TRC_DATA11 4 O
GPMC0_A18 6 O
GPIO114 7 IO
C16 PR0_PRU1_GPIO16PR0_PRU1_GPIO16_CFG_REG
0x5310 01C4
0x0000 05F7 		PR0_PRU1_GPIO16 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX3_CLK 3 O
TRC_DATA10 4 O
GPMC0_A17 6 O
GPIO113 7 IO
C15 PR0_PRU1_GPIO18PR0_PRU1_GPIO18_CFG_REG
0x5310 01E0
0x0000 05F7 		PR0_PRU1_GPIO18 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_TXD 2 O
PR0_IEP0_EDIO_DATA_IN_OUT31 3 IO
TRC_CTL 4 O
XBAROUT14 5 O
GPMC0_WAIT1 6 I
GPIO120 7 IO
EQEP1_B 9 I
D15 PR0_PRU1_GPIO19PR0_PRU1_GPIO19_CFG_REG
0x5310 01DC
0x0000 05F7 		PR0_PRU1_GPIO19 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_RXD 2 I
PR0_IEP0_EDC_SYNC_OUT0 3 O
TRC_CLK 4 O
XBAROUT13 5 O
GPIO119 7 IO
EQEP1_A 9 I
N2 QSPI0_CLKQSPI0_CLK_CFG_REG
0x5310 0008
0x0000 05F7 		QSPI0_CLK 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO2 7 IO
LB QSPI0_CLKLBQSPI0_CLKLB_CFG_REG
0x5310 0244
0x5F0		 QSPI0_CLKLB 0 IO On / Off / Down On / On / Down 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
P1 QSPI0_CSn0QSPI0_CSn0_CFG_REG
0x5310 0000
0x0000 05F7 		QSPI0_CSn0 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO0 7 IO
R3 QSPI0_CSn1QSPI0_CSn1_CFG_REG
0x5310 0004
0x0000 05F7 		QSPI0_CSn1 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
XBAROUT0 5 O
GPIO1 7 IO
N1 QSPI0_D0QSPI0_D0_CFG_REG
0x5310 000C
0x0000 05D7 		QSPI0_D0 0 IO On / Off / Off On / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO3 7 IO
SOP0 Bootstrap I
N4 QSPI0_D1QSPI0_D1_CFG_REG
0x5310 0010
0x0000 05D7 		QSPI0_D1 0 I On / Off / Off On / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO4 7 IO
SOP1 Bootstrap I
M4 QSPI0_D2QSPI0_D2_CFG_REG
0x5310 0014
0x0000 05F7 		QSPI0_D2 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO5 7 IO
P3 QSPI0_D3QSPI0_D3_CFG_REG
0x5310 0018
0x0000 05F7 		QSPI0_D3 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO6 7 IO
R17 RGMII1_RXCRGMII1_RXC_CFG_REG
0x5310 0074
0x0000 05F7 		RGMII1_RXC 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_REF_CLK 1 IO
MII1_RXCLK 2 I
FSITX0_CLK 6 O
GPIO29 7 IO
EQEP2_A 8 I
R18 RGMII1_RX_CTLRGMII1_RX_CTL_CFG_REG
0x5310 0078
0x0000 05F7 		RGMII1_RX_CTL 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_RX_ER 1 I
MII1_RXDV 2 I
FSITX0_DATA0 6 O
GPIO30 7 IO
EQEP2_B 8 I
N18 RGMII1_TXCRGMII1_TXC_CFG_REG
0x5310 008C
0x0000 05F7 		RGMII1_TXC 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
MII1_TXCLK 2 I
FSITX1_CLK 6 O
GPIO35 7 IO
EQEP0_INDEX 8 IO
M18 RGMII1_TX_CTLRGMII1_TX_CTL_CFG_REG
0x5310 0090
0x0000 05F7 		RGMII1_TX_CTL 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_TX_EN 1 O
MII1_TX_EN 2 O
FSITX1_DATA0 6 O
GPIO36 7 IO
EQEP0_STROBE 8 IO
U17 RGMII1_RD0RGMII1_RD0_CFG_REG
0x5310 007C
0x0000 05F7 		RGMII1_RD0 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_RXD0 1 I
MII1_RXD0 2 I
FSITX0_DATA1 6 O
GPIO31 7 IO
EQEP2_STROBE 8 IO
T17 RGMII1_RD1RGMII1_RD1_CFG_REG
0x5310 0080
0x0000 05F7 		RGMII1_RD1 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_RXD1 1 I
MII1_RXD1 2 I
FSIRX0_CLK 6 I
GPIO32 7 IO
EQEP2_INDEX 8 IO
U18 RGMII1_RD2RGMII1_RD2_CFG_REG
0x5310 0084
0x0000 05F7 		RGMII1_RD2 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
MII1_RXD2 2 I
FSIRX0_DATA0 6 I
GPIO33 7 IO
EQEP0_A 8 I
T18 RGMII1_RD3RGMII1_RD3_CFG_REG
0x5310 0088
0x0000 05F7 		RGMII1_RD3 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
MII1_RXD3 2 I
FSIRX0_DATA1 6 I
GPIO34 7 IO
EQEP0_B 8 I
P16 RGMII1_TD0RGMII1_TD0_CFG_REG
0x5310 0094
0x0000 05F7 		RGMII1_TD0 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_TXD0 1 O
MII1_TXD0 2 O
FSITX1_DATA1 6 O
GPIO37 7 IO
EQEP1_A 8 I
P17 RGMII1_TD1RGMII1_TD1_CFG_REG
0x5310 0098
0x0000 05F7 		RGMII1_TD1 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_TXD1 1 O
MII1_TXD1 2 O
FSIRX1_CLK 6 I
GPIO38 7 IO
EQEP1_B 8 I
P18 RGMII1_TD2RGMII1_TD2_CFG_REG
0x5310 009C
0x0000 05F7 		RGMII1_TD2 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
RMII1_CRS_DV 1 I
MII1_TXD2 2 O
FSIRX1_DATA0 6 I
GPIO39 7 IO
EQEP1_STROBE 8 IO
N17 RGMII1_TD3RGMII1_TD3_CFG_REG
0x5310 00A0
0x0000 05F7 		RGMII1_TD3 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
MII1_TXD3 2 O
FSIRX1_DATA1 6 I
GPIO40 7 IO
EQEP1_INDEX 8 IO
T4 RSVD_T4 RSVD_T4 RSVD Reserved Reserved
U1 RSVD_U1 RSVD_U1 RSVD Reserved Reserved
U3 RSVD_U3 RSVD_U3 RSVD Reserved Reserved
V2 RSVD_V2 RSVD_V2 RSVD Reserved Reserved
D4 SAFETY_ERRORnSAFETY_ERRORn_CFG_REG
0x5310 0230
0x410		 SAFETY_ERRORn 0 OD On / Off / Down On / NA / Down 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
B16 SDFM0_CLK0SDFM0_CLK0_CFG_REG
0x5310 01E8
0x0000 05F7 		CLKOUT1 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO122 7 IO
SDFM0_CLK0 8 I
EQEP1_STROBE 9 IO
A16 SDFM0_CLK1SDFM0_CLK1_CFG_REG
0x5310 01F0
0x0000 05F7 		PR0_PRU1_GPIO7 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
CPTS0_TS_SYNC 1 O
UART5_RTSn 2 O
PR0_IEP0_EDC_SYNC_OUT1 3 O
I2C3_SDA 5 IOD
GPIO124 7 IO
SDFM0_CLK1 8 I
B15 SDFM0_CLK2SDFM0_CLK2_CFG_REG
0x5310 01F8
0x0000 05F7 		UART5_TXD 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
I2C3_SCL 5 IOD
GPMC0_ADVn_ALE 6 O
GPIO126 7 IO
SDFM0_CLK2 8 I
A15 SDFM0_CLK3SDFM0_CLK3_CFG_REG
0x5310 0200
0x0000 05F7 		MCAN3_TX 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_RXD 1 I
GPIO128 7 IO
SDFM0_CLK3 8 I
D14 SDFM0_D0SDFM0_D0_CFG_REG
0x5310 01EC
0x0000 05F7 		PR0_ECAP0_APWM_OUT 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO123 7 IO
SDFM0_D0 8 I
D13 SDFM0_D1SDFM0_D1_CFG_REG
0x5310 01F4
0x0000 05F7 		PR0_PRU1_GPIO17 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_CTSn 2 I
PR0_IEP0_EDIO_DATA_IN_OUT30 3 IO
GPIO125 7 IO
SDFM0_D1 8 I
C13 SDFM0_D2SDFM0_D2_CFG_REG
0x5310 01FC
0x0000 05F7 		UART5_RXD 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO127 7 IO
SDFM0_D2 8 I
C14 SDFM0_D3SDFM0_D3_CFG_REG
0x5310 0204
0x0000 05F7 		MCAN3_RX 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
GPIO129 7 IO
SDFM0_D3 8 I
A11 SPI0_CLKSPI0_CLK_CFG_REG
0x5310 0030
0x0000 05D7 		SPI0_CLK 0 IO On / Off / Off On / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_TXD 1 O
LIN3_TXD 2 IO
FSITX0_CLK 6 O
GPIO12 7 IO
SOP2 Bootstrap I
A10 SPI1_CLKSPI1_CLK_CFG_REG
0x5310 0040
0x0000 05F7 		SPI1_CLK 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART4_RXD 1 I
LIN4_RXD 2 IO
XBAROUT2 5 O
FSIRX0_CLK 6 I
GPIO16 7 IO
C11 SPI0_CS0SPI0_CS0_CFG_REG
0x5310 002C
0x0000 05F7 		SPI0_CS0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART3_RXD 1 I
LIN3_RXD 2 IO
GPIO11 7 IO
C10 SPI0_D0SPI0_D0_CFG_REG
0x5310 0034
0x0000 05D7 		SPI0_D0 0 IO On / Off / Off On / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX0_DATA0 6 O
GPIO13 7 IO
SOP3 Bootstrap I
B11 SPI0_D1SPI0_D1_CFG_REG
0x5310 0038
0x0000 05F7 		SPI0_D1 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
FSITX0_DATA1 6 O
GPIO14 7 IO
C9 SPI1_CS0SPI1_CS0_CFG_REG
0x5310 003C
0x0000 05F7 		SPI1_CS0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART4_TXD 1 O
LIN4_TXD 2 IO
XBAROUT1 5 O
GPIO15 7 IO
B10 SPI1_D0SPI1_D0_CFG_REG
0x5310 0044
0x0000 05F7 		SPI1_D0 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_TXD 1 O
XBAROUT3 5 O
FSIRX0_DATA0 6 I
GPIO17 7 IO
D9 SPI1_D1SPI1_D1_CFG_REG
0x5310 0048
0x0000 05F7 		SPI1_D1 0 IO Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
UART5_RXD 1 I
XBAROUT4 5 O
FSIRX0_DATA1 6 I
GPIO18 7 IO
B3 TCKTCK_CFG_REG
0x5310 0240
0x210		 TCK 0 I On / NA / Up On / NA / Up 0 3.3V VDDSHV0 Yes HIGH HYST
C5 TDITDI_CFG_REG
0x5310 0234
0x6D0		 TDI 0 I On / Off / Up On / Off / Up 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
C4 TDOTDO_CFG_REG
0x5310 0238
0x630		 TDO 0 O Off / Off / Up Off / NA / Up 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
D5 TMSTMS_CFG_REG
0x5310 023C
0x610		 TMS 0 IO On / Off / Up On / NA / Up 0 3.3V VDDSHV0 Yes LVCMOS PU/PD
B7 UART0_CTSnUART0_CTSn_CFG_REG
0x5310 0068
0x0000 05F7 		UART0_CTSn 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
I2C2_SDA 1 IOD
SPI3_D1 2 IO
MCAN3_RX 3 I
SPI0_CS1 4 IO
XBAROUT10 5 O
GPIO26 7 IO
C7 UART0_RTSnUART0_RTSn_CFG_REG
0x5310 0064
0x0000 05F7 		UART0_RTSn 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
I2C2_SCL 1 IOD
SPI3_D0 2 IO
MCAN3_TX 3 O
XBAROUT9 5 O
GPIO25 7 IO
A7 UART0_RXDUART0_RXD_CFG_REG
0x5310 006C
0x0000 05F7 		UART0_RXD 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN0_RXD 1 IO
GPIO27 7 IO
A6 UART0_TXDUART0_TXD_CFG_REG
0x5310 0070
0x0000 05F7 		UART0_TXD 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN0_TXD 1 IO
GPIO28 7 IO
L3 UART1_RXDUART1_RXD_CFG_REG
0x5310 012C
0x0000 05F7 		UART1_RXD 0 I Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN1_RXD 1 IO
EPWM16_A 5 O
GPMC0_AD6 6 IO
GPIO75 7 IO
M3 UART1_TXDUART1_TXD_CFG_REG
0x5310 0130
0x0000 05F7 		UART1_TXD 0 O Off / Off / Off Off / Off / Off 7 3.3V VDDSHV0 Yes LVCMOS PU/PD
LIN1_TXD 1 IO
EPWM16_B 5 O
GPMC0_AD7 6 IO
GPIO76 7 IO
E11, E9, F11, F9, G13, G14, G5, G6, J16, K13, K14, K5, K6, N13, N14, N5, N6, R9 VDD VDD PWR 1.2V
R11, R8 VDDA18 VDDA18 PWR 1.8V
R6 VDDA18_LDO VDDA18_LDO PWR 1.8V
R4 VDDA18_OSC_PLL VDDA18_OSC_PLL PWR 1.8V
P11, P7, P9 VDDA33 VDDA33 PWR 3.3V
J15 VDDAR1 VDDAR1 PWR 1.2V
D10 VDDAR2 VDDAR2 PWR 1.2V
H3 VDDAR3 VDDAR3 PWR 1.2V
D6, E15, L4, N15 VDDS18 VDDS18 PWR 1.8V
T3 VDDS18_LDO VDDS18_LDO PWR 1.8V
D12, D8, H15, H4, L15, P4, R15 VDDS33 VDDS33 PWR 3.3V
N3 VPP VPP PWR VPP
A1, A18, E10, E12, E13, E14, E5, E6, E7, E8, F10, F12, F13, F14, F5, F6, F7, F8, G10, G11, G12, G7, G8, G9, H10, H11, H12, H13, H14, H5, H6, H7, H8, H9, J10, J11, J12, J13, J14, J5, J6, J7, J8, J9, K10, K11, K12, K7, K8, K9, L10, L11, L12, L13, L14, L5, L6, L7, L8, L9, M10, M11, M12, M13, M14, M5, M6, M7, M8, M9, N10, N11, N12, N7, N8, N9, P13, P14, P5, T2, V18 VSS VSS GND VSS
P10, P12, P6, P8, R13, R5, V1, V16 VSSA VSSA AGND VSSA
U2 VSYS_MON VSYS_MON PWR 0.9V VDDA_CIO AnalogCIO
C3 WARMRSTnWARMRSTn_CFG_REG
0x5310 022C
0x510		 WARMRSTn 0 IO On / Off / Off On / NA / Off 0 3.3V VDDSHV0 FS OD
T1 XTAL_XI XTAL_XI I 0 1.8V VDDS_OSC Yes HFOSC
R1 XTAL_XO XTAL_XO O 0 1.8V VDDS_OSC HFOSC