Refer to the PDF data sheet for device specific package drawings
|sysboot||Used to permanently disable the internal PU/PD resistors on pads gpmc_a[27:24, 22:19].|
|sysboot||Must be pulled to vss for proper device operation.|
|sysboot[13:10]||Used to configure the GPMC interface when booting from XIP/NAND memory connected to GPMC.|
|sysboot[9:8]||Selects the SYS_CLK1 clock speed. Must be set correctly according to the speed of the connected crystal.|
|sysboot[7:6]||Sector offset for the location of the redundant SBL images in QSPI.|
|sysboot[5:0]||Select interfaces or devices for the booting list|
|sysboot||mmc2_dat[7:0] PULL-DOWN RESISTORS|
|0b0||Software re-configuration of pull resistors is allowed. Internal pull-downs on gpmc_a[n:19] are enabled by default to allow GPMC boot. Pulling low gpmc_a[n:19] is required in order to access the low-order address locations in the flash memory during boot (n = [27:24, 22:19] and depends on the memory volume).|
|0b1||Internal pull-down resistors permanently disabled to avoid contention with the recommended per eMMC standard pull-ups that should be present on PCB. Software re-configuration of internal pull resistors is disabled.|
All sysboot pads are sampled and latched onto the CTRL_CORE_BOOTSTRAP register (in control module) after POR. After booting, these pads can be used for other functions such as GPIOs, and the associated register bit field is not updated by the new functionality.
If used as GPIOs, the sysboot[15:0] pads must be used only in output mode to ensure that the input values always match a certain hardware predefined boot pattern, interpreted after each POR.
For more information about Boot Mode List, see Sysboot Configuration section in the device TRM.