SWRS205D March 2017 – September 2020 CC3120MOD
Refer to the PDF data sheet for device specific package drawings
The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small section of the logic powered directly by the main input supply is retained. The real-time clock (RTC) is kept running and the module wakes up when the n_HIB line is asserted by the host driver. The typical battery drain in this mode is 5 µA. The wake-up time is longer than LPDS mode at about 50 ms.