SWRS226B February   2020  – May 2021 CC3230S , CC3230SF

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Functional Block Diagrams
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Pin Attributes
      1. 7.2.1 Pin Descriptions
    3. 7.3 Signal Descriptions
      1.      13
    4. 7.4 Pin Multiplexing
    5. 7.5 Drive Strength and Reset States for Analog and Digital Multiplexed Pins
    6. 7.6 Pad State After Application of Power to Device, Before Reset Release
    7. 7.7 Connections for Unused Pins
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Power-On Hours (POH)
    4. 8.4  Recommended Operating Conditions
    5. 8.5  Current Consumption Summary (CC3230S)
      1.      24
    6. 8.6  Current Consumption Summary (CC3230SF)
      1.      26
    7. 8.7  TX Power Control
    8. 8.8  Brownout and Blackout Conditions
    9. 8.9  Electrical Characteristics for GPIO Pins
      1. 8.9.1 Electrical Characteristics: GPIO Pins Except 29, 30, 50, 52, and 53
      2. 8.9.2 Electrical Characteristics: GPIO Pins 29, 30, 50, 52, and 53
    10. 8.10 Electrical Characteristics for Pin Internal Pullup and Pulldown
      1.      33
    11. 8.11 WLAN Receiver Characteristics
      1.      35
    12. 8.12 WLAN Transmitter Characteristics
      1.      37
    13. 8.13 WLAN Transmitter Out-of-Band Emissions
      1. 8.13.1 WLAN Filter Requirements
    14. 8.14 BLE/2.4 GHz Radio Coexistence and WLAN Coexistence Requirements
    15. 8.15 Thermal Resistance Characteristics for RGK Package
    16. 8.16 Timing and Switching Characteristics
      1. 8.16.1 Power Supply Sequencing
      2. 8.16.2 Device Reset
      3. 8.16.3 Reset Timing
        1. 8.16.3.1 nRESET (32-kHz Crystal)
        2. 8.16.3.2 First-Time Power-Up and Reset Removal Timing Requirements (32-kHz Crystal)
        3. 8.16.3.3 nRESET (External 32-kHz Clock)
          1. 8.16.3.3.1 First-Time Power-Up and Reset Removal Timing Requirements (External 32-kHz Clock)
      4. 8.16.4 Wakeup From HIBERNATE Mode
      5. 8.16.5 Clock Specifications
        1. 8.16.5.1 Slow Clock Using Internal Oscillator
        2. 8.16.5.2 Slow Clock Using an External Clock
          1. 8.16.5.2.1 External RTC Digital Clock Requirements
        3. 8.16.5.3 Fast Clock (Fref) Using an External Crystal
          1. 8.16.5.3.1 WLAN Fast-Clock Crystal Requirements
        4. 8.16.5.4 Fast Clock (Fref) Using an External Oscillator
          1. 8.16.5.4.1 External Fref Clock Requirements (–40°C to +85°C)
      6. 8.16.6 Peripherals Timing
        1. 8.16.6.1  SPI
          1. 8.16.6.1.1 SPI Master
            1. 8.16.6.1.1.1 SPI Master Timing Parameters
          2. 8.16.6.1.2 SPI Slave
            1. 8.16.6.1.2.1 SPI Slave Timing Parameters
        2. 8.16.6.2  I2S
          1. 8.16.6.2.1 I2S Transmit Mode
            1. 8.16.6.2.1.1 I2S Transmit Mode Timing Parameters
          2. 8.16.6.2.2 I2S Receive Mode
            1. 8.16.6.2.2.1 I2S Receive Mode Timing Parameters
        3. 8.16.6.3  GPIOs
          1. 8.16.6.3.1 GPIO Output Transition Time Parameters (Vsupply = 3.3 V)
            1. 8.16.6.3.1.1 GPIO Output Transition Times (Vsupply = 3.3 V) (1) (1)
          2. 8.16.6.3.2 GPIO Input Transition Time Parameters
            1. 8.16.6.3.2.1 GPIO Input Transition Time Parameters
        4. 8.16.6.4  I2C
          1. 8.16.6.4.1 I2C Timing Parameters (1)
        5. 8.16.6.5  IEEE 1149.1 JTAG
          1. 8.16.6.5.1 JTAG Timing Parameters
        6. 8.16.6.6  ADC
          1. 8.16.6.6.1 ADC Electrical Specifications
        7. 8.16.6.7  Camera Parallel Port
          1. 8.16.6.7.1 Camera Parallel Port Timing Parameters
        8. 8.16.6.8  UART
        9. 8.16.6.9  SD Host
        10. 8.16.6.10 Timers
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  Arm® Cortex®-M4 Processor Core Subsystem
    3. 9.3  Wi-Fi® Network Processor Subsystem
      1. 9.3.1 WLAN
      2. 9.3.2 Network Stack
    4. 9.4  Security
    5. 9.5  Power-Management Subsystem
    6. 9.6  Low-Power Operating Mode
    7. 9.7  Memory
      1. 9.7.1 External Memory Requirements
      2. 9.7.2 Internal Memory
        1. 9.7.2.1 SRAM
        2. 9.7.2.2 ROM
        3. 9.7.2.3 Flash Memory
        4. 9.7.2.4 Memory Map
    8. 9.8  Restoring Factory Default Configuration
    9. 9.9  Boot Modes
      1. 9.9.1 Boot Mode List
    10. 9.10 Hostless Mode
  10. 10Applications, Implementation, and Layout
    1. 10.1 Application Information
      1. 10.1.1 BLE/2.4 GHz Radio Coexistence
      2. 10.1.2 Antenna Selection
      3. 10.1.3 Typical Application
    2. 10.2 PCB Layout Guidelines
      1. 10.2.1 General PCB Guidelines
      2. 10.2.2 Power Layout and Routing
        1. 10.2.2.1 Design Considerations
      3. 10.2.3 Clock Interface Guidelines
      4. 10.2.4 Digital Input and Output Guidelines
      5. 10.2.5 RF Interface Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Tools and Software
    3. 11.3 Firmware Updates
    4. 11.4 Device Nomenclature
    5. 11.5 Documentation Support
    6. 11.6 Support Resources
    7. 11.7 Trademarks
    8. 11.8 Electrostatic Discharge Caution
    9. 11.9 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.1.3 Typical Application

Figure 10-5 shows the schematic of the engine area for the CC3230x device in the wide-voltage mode of operation, and the optional RF implementations with BLE/2.4GHz coexistence. The corresponding Bill-of-Materials show in Table 10-1. For a full operation reference design, see the CC3235x SimpleLink™ and Internet of Things Hardware Design Files.

Note:

The Following guidelines are recommended for implementation of the RF design:

  • Ensure an RF path is designed with an impedance of 50 Ω
  • Tuning of the antenna impedance π matching network is recommended after manufacturing of the PCB to account for PCB parasitics
  • π or L matching and tuning may be required between cascaded passive components on the RF path
GUID-1C5E7D2E-B556-42A0-BCEC-A891BC74E8DB-low.gif Figure 10-5 CC3230x Engine Area and Optional BLE Coexistence
Table 10-1 Bill-of-Materials for CC3230x Engine Area and Optional Coexistence
QUANTITY DESIGNATOR VALUE MANUFACTURER PART NUMBER DESCRIPTION
1 C1 1 µF MuRata GRM155R61A105KE15D Capacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2 C2, C3 100 µF Taiyo Yuden LMK325ABJ107MMHT Capacitor, Ceramic, 100 µF,
10 V, ±20%, X5R, 1210
3 C4, C5, C6 4.7 µF TDK C1005X5R0J475M050BC Capacitor, Ceramic, 4.7 µF,
6.3 V, ±20%, X5R, 0402
10 C7, C8, C9, C11, C12, C13, C18, C19, C21, C22 0.1 µF TDK C1005X5R1A104K050BA Capacitor, Ceramic, 0.1 µF,
10 V, ±10%, X5R, 0402
3 C10, C17, C20 10 µF MuRata GRM188R60J106ME47D Capacitor, Ceramic, 10 µF,
6.3 V, ±20%, X5R, 0603
2 C14, C15 22 µF TDK C1608X5R0G226M080AA Capacitor, Ceramic, 22 µF,
4 V, ±20%, X5R, 0603
1 C16 1 µF TDK C1005X5R1A105K050BB Capacitor, Ceramic, 1 µF,
10 V, ±10%, X5R, 0402
2 C23, C24 10 pF MuRata GRM1555C1H100JA01D Capacitor, Ceramic, 10 pF,
50 V, ±5%, C0G/NP0, 0402
2 C25, C26 6.2 pF MuRata GRM1555C1H6R2CA01D Capacitor, Ceramic, 6.2 pF,
50 V, ±5%, C0G/NP0, 0402
1 C27 0.5 pF MuRata GRM1555C1HR50BA01D Capacitor, Ceramic, 0.5 pF,
50 V, ±20%, C0G/NP0, 0402
3 C28(3), C29(3), C30(3) 68 pF MuRata GRM0335C1H680JA1D CAP, CERM, 68 pF, 50 V,
+/- 5%, C0G/NP0, 0201
2 C31(3), C32(3) 100 pF Yageo CC0201JRNPO8BN101 CAP, CERM, 100 pF, 25 V,
+/- 5%, C0G/NP0, 0201
1 E1 2.45-GHz Antenna Taiyo Yuden AH316M245001-T ANT Bluetooth W-LAN
Zigbee®, SMD
1 FL1 1.02 dB TDK DEA202450BT-1294C1-H Multilayer Chip Band Pass Filter
For 2.4 GHz W-LAN/Bluetooth, SMD
1 L1 3.3 nH MuRata LQG15HS3N3S02D Inductor, Multilayer, Air Core,
3.3 nH, 0.3 A, 0.17 ohm, SMD
2 L2, L4 2.2 µH MuRata LQM2HPN2R2MG0L Inductor, Multilayer, Ferrite,
2.2 µH, 1.3 A, 0.08 ohm, SMD
1 L3 1 µH MuRata LQM2HPN1R0MG0L Inductor, Multilayer, Ferrite,
1 µH, 1.6 A, 0.055 ohm, SMD
1 L5(1) 10 µH Taiyo Yuden CBC2518T100M Inductor, Wirewound, Ceramic,
10 µH, 0.48 A, 0.36 ohm, SMD
1 R1 10 k Vishay-Dale CRCW040210K0JNED Resistor, 10 k, 5%, 0.063 W, 0402
6 R2, R3, R4, R5, R9(3), R10(3) 100 k Vishay-Dale CRCW0402100KJNED Resistor, 100 k, 5%, 0.063 W, 0402
1 R6 2.7 k Vishay-Dale CRCW04022K70JNED Resistor, 2.7 k, 5%, 0.063 W, 0402
1 R7 270 Vishay-Dale CRCW0402270RJNED Resistor, 270, 5%, 0.063 W, 0402
1 R8(2) 0 Panasonic ERJ-2GE0R00X Resistor, 0, 5% 0.063W, 0402
1 U1 MX25R Macronix International Co., LTD MX25R3235FM1IL0 Ultra-Low Power, 32-Mbit [x 1/x 2/x 4]
CMOS MXSMIO (Serial Multi I/O)
Flash Memory, SOP-8
1 U2 CC3230 Texas Instruments CC3230SF12RGK SimpleLink™ Wi-Fi® and internet-of-things
Solution, a Single-Chip Wireless
MCU, RGK0064B
1 U3(3) SPDT Switch Richwave RTC6608OSP 0.03 GHz-6 GHz SPDT Switch
1 Y1 Crystal Abracon Corportation ABS07-32.768KHZ-9-T Crystal, 32.768 KHz, 9PF, SMD
1 Y2 Crystal Epson Q24FA20H0039600 Crystal, 40 MHz, 8pF, SMD
(1) For the CC3230SF device, L5 is populated. For the CC3230S device, L5 is not populated.
(2) For the CC3230SF device, R8 is not populated. For the CC3230S device if R8 is populated, Pin 45 can be used as GPIO_31.
(3) If the BLE/2.4 GHz Coexistence features is not used, these components are not required.