SLASF48 May   2022

PRODUCTION DATA

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
1. 7.4.1 Voltage-Output Mode
1. 7.4.1.1 Voltage Reference and DAC Transfer Function
2. 7.4.2 Current-Output Mode
3. 7.4.3 Comparator Mode
4. 7.4.4 Fault-Dump Mode
5. 7.4.5 Application-Specific Modes
1. 7.4.5.1 Voltage Margining and Scaling
2. 7.4.5.2 Function Generation
6. 7.4.6 Device Reset and Fault Management
7. 7.4.7 Power-Down Mode
5. 7.5 Programming
1. 7.5.1 SPI Programming Mode
2. 7.5.2 I2C Programming Mode
1. 7.5.2.1 F/S Mode Protocol
2. 7.5.2.2 I2C Update Sequence
3. 7.5.2.3 I2C Read Sequence
3. 7.5.3 General-Purpose Input/Output (GPIO) Modes
6. 7.6 Register Map
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

• RTE|16
• RTE|16

### 8.2.2 Detailed Design Procedure

The DACx300x features a Hi-Z power-down mode that is set by default at power-up, unless the device is programmed otherwise using the NVM. When the DAC output is at Hi-Z, the current through R3 is zero and the SMPS is set at the nominal output voltage of 3.3 V. To have the same nominal condition when the DAC powers up, bring up the device at the same output as VFB (that is 0.6 V). This configuration makes sure there is no current through R3 even at power-up. Calculate R1 as (VOUT – VFB) / 100 µA = 27 kΩ.

To achieve ±10% margin-high and margin-low conditions, the DAC must sink or source additional current through R1. Calculate the current from the DAC (IMARGIN) using Equation 10 as 12 µA.

Equation 10. ${\mathrm{I}}_{\mathrm{M}\mathrm{A}\mathrm{R}\mathrm{G}\mathrm{I}\mathrm{N}}=\left(\frac{{\mathrm{V}}_{\mathrm{O}\mathrm{U}\mathrm{T}}×\left(1+\mathrm{M}\mathrm{A}\mathrm{R}\mathrm{G}\mathrm{I}\mathrm{N}\right)-{\mathrm{V}}_{\mathrm{F}\mathrm{B}}}{{\mathrm{R}}_{1}}\right)-{\mathrm{I}}_{\mathrm{N}\mathrm{O}\mathrm{M}\mathrm{I}\mathrm{N}\mathrm{A}\mathrm{L}}$

where

• IMARGIN is the margin current sourced or sinked from the DAC.
• MARGIN is the percentage margin value divided by 100.
• INOMINAL is the nominal current through R1 and R2.
• VOUT is the output voltage of the respective DAC channel.
• VFB is the reference voltage at the SENSE node of the power converter.
• R1 is the resistance between the output and SENSE pin of the power converter.

To calculate the value of R3, first decide the DAC output range, and make sure to avoid the codes near zero-scale and full-scale for safe operation in the linear region. A DAC output of 20 mV is a safe consideration as the minimum output, and (1.8 V – 0.6 V – 20 mV = 1.18 V) as the maximum output. When the DAC output is at 20 mV, the power supply goes to margin high, and when the DAC output is at 1.18 V, the power supply goes to margin low. Calculate the value of R3 using Equation 11 as 48.3 kΩ. Choose a standard resistor value and adjust the DAC outputs. Choosing R3 = 47 kΩ makes the DAC margin high code as 1.164 V and the DAC margin low code as 36 mV.

Equation 11. ${\mathrm{R}}_{3}=\frac{\left|{\mathrm{V}}_{\mathrm{D}\mathrm{A}\mathrm{C}}-{\mathrm{V}}_{\mathrm{F}\mathrm{B}}\right|}{{\mathrm{I}}_{\mathrm{M}\mathrm{A}\mathrm{R}\mathrm{G}\mathrm{I}\mathrm{N}}}$

When the DACx300x are set to current-output mode, series resistor R3 is not required. Set the DAC output at the current-output range of –25 µA to +25 µA, and set the DAC code accordingly to achieve a margin current of ±12 µA.

The DACx300x have a slew-rate feature that is used to toggle between margin high, margin low, and nominal outputs with a defined slew rate; see also Section 7.6.7.

Note:

The DAC-X-MARGIN-HIGH register value in DACx300x results in the margin-low value at the power supply output. Similarly, the DAC-X-MARGIN-LOW register value in DACx300x results in the margin-high value at the power-supply output.

The pseudocode for getting started with a power-supply control application is as follows:

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>
//Write DAC code for nominal output (repeat for all DAC channels)
//For a 1.8-V output range, the 10-bit hex code for 0.6 V is 0x155. With 16-bit left alignment, this becomes 0x5540
WRITE DAC_0_DATA(0x1C), 0x55, 0x40
//Power-up voltage output on both the channels, enables internal reference
WRITE COMMON-CONFIG(0x1F), 0x12, 0x01
//Set channel 0 gain setting to 1.5x internal reference (1.8 V)
WRITE DAC-0-VOUT-CMP-CONFIG(0x15), 0x08, 0x00
//Set channel 1 gain setting to 1.5x internal reference (1.8 V)
WRITE DAC-1-VOUT-CMP-CONFIG(0x3), 0x08, 0x00
//Configure GPI for Margin-High, Low trigger for all channels
WRITE GPIO-CONFIG(0x24), 0x01, 0x35
//Set slew rate and code step (repeat for all channels)
//CODE_STEP: 2 LSB, SLEW_RATE: 60.72 µs/step
WRITE DAC-0-FUNC-CONFIG(0x18), 0x00, 0x17
//Write DAC margin high code (repeat for all channels)
//For a 1.8-V output range, the 10-bit hex code for 1.164 V is 0x296. With 16-bit left alignment, this becomes 0xA540
WRITE DAC-0-MARGIN-HIGH(0x13), 0xA5, 0x40
//Write DAC margin low code (repeat for all channels)
//For a 1.8-V output range, the 10-bit hex code for 36 mV is 0x14. With 16-bit left alignment, this becomes 0x0500
WRITE DAC-0-MARGIN-LOW(0x14), 0x05, 0x00
//Save settings to NVM
WRITE COMMON-TRIGGER(0x20), 0x00, 0x02