DLPS167 March 2024 DLPC964
PRODUCTION DATA
To each Aurora core, a full DMD block is an array of 1024 columns by 136 rows. Table 7-4 shows the mapping of the 192-bit Aurora data bus to a full DMD block in increment direction (first Aurora data packet starts at row 0). The data bus requires 726 Aurora data packets to transmit a full block. For the last packet, only bits 0–63 are required and bits 64–191 are ignored by DLPC964 controller.
Table 7-5 shows the data mapping in the decrement direction, with the first Aurora data packet starting at row 135.
Row 0 | Data 0 [0:191] | Data 1 [0:191] | Data 2 [0:191] | Data 3 [0:191] | Data 4 [0:191] | Data 5 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 | |
Row 1 | Data 5 [64:191] | Data 6 [0:191] | Data 7 [0:191] | Data 8 [0:191] | Data 9 [0:191] | Data 10 [0:127] |
Column 0 – 127 | Column 128 – 319 | Column 320 – 511 | Column 512 – 703 | Column 704 – 895 | Column 896 – 1023 | |
Row 2 | Data 10 [128:191] | Data 11 [0:191] | Data 12 [0:191] | Data 13 [0:191] | Data 14 [0:191] | Data 15 [0:191] |
Column 0 – 63 | Column 64 – 255 | Column 256 – 447 | Column 448 – 639 | Column 640 – 831 | Column 832 – 1023 | |
Row 3 | Data 16 [0:191] | Data 17 [0:191] | Data 18 [0:191] | Data 19 [0:191] | Data 20 [0:191] | Data 21 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 | |
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Row 134 | Data 714 [128:191] | Data 715 [0:191] | Data 716 [0:191] | Data 717 [0:191] | Data 718 [0:191] | Data 719 [0:191] |
Column 0 – 63 | Column 64 – 255 | Column 256 – 447 | Column 448 – 639 | Column 640 – 831 | Column 832 – 1023 | |
Row 135 | Data 720 [0:191] | Data 721 [0:191] | Data 722 [0:191] | Data 723 [0:191] | Data 724 [0:191] | Data 725 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 |
Row 0 | Data 720 [0:191] | Data 721 [0:191] | Data 722 [0:191] | Data 723 [0:191] | Data 724 [0:191] | Data 725 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 | |
Row 1 | Data 714 [128:191] | Data 715 [0:191] | Data 716 [0:191] | Data 717 [0:191] | Data 718 [0:191] | Data 719 [0:127] |
Column 0 – 63 | Column 64 – 255 | Column 256 – 447 | Column 448 – 639 | Column 640 – 831 | Column 832 – 1023 | |
Row 2 | Data 709 [64:191] | Data 710 [0:191] | Data 711 [0:191] | Data 712 [0:191] | Data 713 [0:191] | Data 714 [0:127] |
Column 0 – 127 | Column 128 – 319 | Column 320 – 511 | Column 512 – 703 | Column 704 – 895 | Column 896 – 1023 | |
Row 3 | Data 704 [0:191] | Data 705 [0:191] | Data 706 [0:191] | Data 707 [0:191] | Data 708 [0:191] | Data 709 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 | |
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Row 134 | Data 5 [128:191] | Data 6 [0:191] | Data 7 [0:191] | Data 8 [0:191] | Data 9 [0:191] | Data 10 [0:191] |
Column 0 – 127 | Column 128 – 319 | Column 320 – 511 | Column 512 – 703 | Column 704 – 895 | Column 896 – 1023 | |
Row 135 | Data 0 [0:191] | Data 1 [0:191] | Data 2 [0:191] | Data 3 [0:191] | Data 4 [0:191] | Data 5 [0:63] |
Column 0 – 191 | Column 192 – 383 | Column 384 – 575 | Column 576 – 767 | Column 768 – 959 | Column 960 – 1023 |