SNLS638B December   2018  – January 2025 DP83825I

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     DP83825I Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Auto-Negotiation (Speed / Duplex Selection)
      2. 6.3.2  Auto-MDIX Resolution
      3. 6.3.3  Energy Efficient Ethernet
        1. 6.3.3.1 EEE Overview
        2. 6.3.3.2 EEE Negotiation
      4. 6.3.4  EEE for Legacy MACs Not Supporting 802.3az
      5. 6.3.5  Wake-on-LAN Packet Detection
        1. 6.3.5.1 Magic Packet Structure
        2. 6.3.5.2 Magic Packet Example
        3. 6.3.5.3 Wake-on-LAN Configuration and Status
      6. 6.3.6  Low Power Modes
        1. 6.3.6.1 Active Sleep
      7. 6.3.7  IEEE Power Down
      8. 6.3.8  Deep Power Down
      9. 6.3.9  Reduced Media Independent Interface (RMII)
      10. 6.3.10 RMII Repeater Mode
      11. 6.3.11 Serial Management Interface
        1. 6.3.11.1 Extended Register Space Access
        2. 6.3.11.2 Read Operation
        3. 6.3.11.3 Write Operation
      12. 6.3.12 100BASE-TX
        1. 6.3.12.1 100BASE-TX Transmitter
          1. 6.3.12.1.1 Code-Group Encoding and Injection
          2. 6.3.12.1.2 Scrambler
          3. 6.3.12.1.3 NRZ to NRZI Encoder
          4. 6.3.12.1.4 Binary to MLT-3 Converter
        2. 6.3.12.2 100BASE-TX Receiver
      13. 6.3.13 10BASE-Te
        1. 6.3.13.1 Squelch
        2. 6.3.13.2 Normal Link Pulse Detection and Generation
        3. 6.3.13.3 Jabber
        4. 6.3.13.4 Active Link Polarity Detection and Correction
      14. 6.3.14 Loopback Modes
        1. 6.3.14.1 MII Loopback
        2. 6.3.14.2 PCS Loopback
        3. 6.3.14.3 Digital Loopback
        4. 6.3.14.4 Analog Loopback
        5. 6.3.14.5 Reverse Loopback
      15. 6.3.15 BIST Configurations
      16. 6.3.16 Cable Diagnostics
        1. 6.3.16.1 TDR
        2. 6.3.16.2 Fast Link-Drop Functionality
    4. 6.4 Device Functional Modes
    5. 6.5 Programming
      1. 6.5.1 Straps Configuration
        1. 6.5.1.1 Straps for PHY Address
    6. 6.6 Device Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 Clock Requirements
          1. 7.2.1.1.1 Oscillator
          2. 7.2.1.1.2 Crystal
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 RMII Layout Guidelines
        2. 7.2.2.2 MDI Layout Guidelines
        3. 7.2.2.3 TPI Network Circuit
        4. 7.2.2.4 VOD Configuration
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Signal Traces
        2. 7.4.1.2 Return Path
        3. 7.4.1.3 Transformer Layout
          1. 7.4.1.3.1 Transformer Recommendations
        4. 7.4.1.4 Capacitive DC Blocking
        5. 7.4.1.5 Metal Pour
        6. 7.4.1.6 PCB Layer Stacking
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Device Functional Modes

DP83825I offers modes to optimize cable reach and power consumption. In default mode, The DP83825I offers a cable reach of 100 meters and above. To achieve a 150-meter cable with the lowest power consumption and Energy Efficient Ethernet, the designer must program a configuration after PHY is out of reset. The following section describes the various modes available and configuration required to achieve these.

  • Default Mode

    This mode offers a 100+ meters cable reach mode where no additional configuration programming is needed.

  • Power Optimized Mode

    This mode offers the lowest power consumption along with a cable reach of 130 meters and more. Table 6-5 shows the required register configuration that is programmed through the MDC/MDIO interface.

    Table 6-5 Configurations for Power Optimized Mode, 130-Meter Cable Reach
    Register AddressValue
    0x04160x1F30
    0x040D0x000D
    0x04290x0200
    0x030B0x0BC0
    0X030C0x0011
    0x033C0x0001
    0X03110x0000
    0x03130x06E3
    0x033A0x579C
    0x04040x0000
    0x033D0x8110
    0x031B0x0048
    0x001F0x4000
  • Cable Reach Optimized Mode

    This mode offers a cable reach of up to 150 meters. Table 6-6 shows the required register configuration that is programmed through the MDC/MDIO interface.

    Table 6-6 Configurations for Cable Reach Optimized Mode, 150-Meter Cable Reach
    Register AddressValue
    0x04160x1F30
    0x040D0x000D
    0x04290x0200
    0x030B0x0BC0
    0X030C0x0011
    0x033C0x0001
    0X03110x0000
    0x03130x06E3
    0x033A0x579C
    0x04040x0080
    0x033D0x8110
    0x031B0x0048
    0x001F0x4000
  • Cable Reach Optimized Mode with EEE

    Energy Efficient Ethernet (EEE) is disabled by default in the DP83825I. EEE must be enabled through register programming. Table 6-7 shows the required register configuration that is programmed through the MDC/MDIO interface

    Table 6-7 Configurations for EEE
    Register AddressValue
    0x04160x1F30
    0x040D0x000d
    0x04290x0200
    0x030B0x0BC0
    0x30C0x0011
    0x33C0x0001
    0x03110x0000
    0x03130x06E3
    0x033A0x579C
    0x04040x0080
    0x01300x4750
    0x01230x0800
    0x030F0x0400
    0x04D40x6633
    0x4D50x027F
    0x4D60x01B0
    0x4D70x01B0
    0x031F0xFC36
    0x031C0x1103
    0x01010x0882
    0x010A0x2010
    0x04CE0x00FF
    0x04CD0xA5A5
    0x03080x0982
    0x04CF0x231D
    0x04D00x0F8F
    0x033E0x861E
    0x04D10x00C2
    0x04D20x215B
    0x033D0x8110
    0x031B0x0048
    0x001F0x4000