SLVSFU5B February 2020 – August 2021 DRV8220
PRODUCTION DATA
Bringing nSLEEP to 0 V puts the DRV8220 to sleep in half-bridge mode. Section 8.4.2 describes how to enter low-power sleep mode in detail. When entering sleep mode, TI recommends setting all inputs as a logic low to minimize system power. To wake up the DRV8220 in half-bridge mode, bring nSLEEP high, then set IN1 or IN2 high for longer than tWAKE before returning low or sending a PWM signal. Figure 9-16 and Figure 9-17 show this wakeup procedure.
To minimize leakage current into the OUTx pins (especially in battery-powered applications), connect the load from OUTx to GND. As mentioned earlier, connecting the load from OUTx to VM is also possible, but there may be some small leakage current into OUTx when it is disabled. No leakage current is expected if loads are connected in H-bridge configuration.