at TA = 25°C, VS = ±15 V, RL = 10 kΩ, VREF = 0 V, and G = 2000 (unless otherwise noted)
| N = 3172, mean = –4.678 µV,
std dev = 5.715 µV |
Figure 7-1 Typical Distribution of Input Offset Voltage
Figure 7-3 Input-referred Offset Voltage vs Temperature
| N = 527, mean = 17.876 nA,
std dev = 2.875 nA |
Figure 7-5 Typical Distribution of Input Bias Current 
| N = 1080, mean = 356.396 ppm, std
dev = 186.085 ppm |
Figure 7-7 Typical Distribution of Gain Error 
Figure 7-9 Input
Common-Mode Voltage vs Output Voltage
Figure 7-11 Positive Input Bias
Current vs Input Common-Mode Voltage
Figure 7-13 Input Offset Current vs
Temperature
Figure 7-15 CMRR
vs Frequency (RTI)
Figure 7-17 Negative PSRR vs Frequency (RTI)
Figure 7-19 Current Noise Spectral Density vs Frequency (RTI)
Figure 7-21 Gain
Error vs Temperature
Figure 7-23 Large-Signal Step Response
Figure 7-25 Small
Signal Response
Figure 7-27 Supply Current vs Temperature
Figure 7-29 Negative Output Voltage Swing vs Output Current
Figure 7-31 Short
Circuit Current (Source + Sink) vs Temperature
| N = 45, mean = 0.116 µV/°C,
std dev = 0.102 µV/°C |
Figure 7-2 Typical Distribution of Input Offset Voltage Drift
| N = 527, mean = 0.1369 nA,
std dev = 1.222 nA |
Figure 7-4 Typical Distribution of Input Offset Current
| N = 527, mean = -0.0840 µV/V,
std dev = 0.0420 µV/V |
Figure 7-6 Typical CMRR Distribution
Figure 7-8 CMRR
vs Temperature
Figure 7-10 Input Bias Current vs
Temperature
Figure 7-12 Negative Input Bias
Current vs Input Common-Mode Voltage
Figure 7-14 Input Offset Current vs
Input Common-Mode Voltage
Figure 7-16 Positive PSRR vs Frequency (RTI)
Figure 7-18 Voltage Noise Spectral Density vs Frequency (RTI)
Figure 7-20 0.1-Hz to 10-Hz RTI Voltage Noise
Figure 7-22 Closed Loop Gain vs Frequency
Figure 7-24 Small
Signal Response vs Capacitive Loads
Figure 7-26 Slew
Rate vs Temperature 
Figure 7-28 Positive Output Voltage Swing vs Output Current
Figure 7-30 Input-Referred Offset Voltage vs Settling Time