SWRS228A
september 2019 – january 2022
IWR1843
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Functional Block Diagram
5
Revision History
6
Device Comparison
6.1
Related Products
7
Terminal Configuration and Functions
7.1
Pin Diagram
7.2
Signal Descriptions
7.2.1
Signal Descriptions - Digital
7.2.2
Signal Descriptions - Analog
7.3
Pin Attributes
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Power-On Hours (POH)
8.4
Recommended Operating Conditions
8.5
Power Supply Specifications
8.6
Power Consumption Summary
8.7
RF Specification
8.8
CPU Specifications
8.9
Thermal Resistance Characteristics for FCBGA Package [ABL0161]
8.10
Timing and Switching Characteristics
8.10.1
Power Supply Sequencing and Reset Timing
8.10.2
Input Clocks and Oscillators
8.10.2.1
Clock Specifications
8.10.3
Multibuffered / Standard Serial Peripheral Interface (MibSPI)
8.10.3.1
Peripheral Description
8.10.3.2
MibSPI Transmit and Receive RAM Organization
8.10.3.2.1
SPI Timing Conditions
8.10.3.2.2
SPI Controller Mode Switching Parameters (CLOCK PHASE = 0, SPICLK = output, SPISIMO = output, and SPISOMI = input) #GUID-C70CFB1F-161A-495B-85B8-62E1C643D037/T4362547-236 #GUID-C70CFB1F-161A-495B-85B8-62E1C643D037/T4362547-237 #GUID-C70CFB1F-161A-495B-85B8-62E1C643D037/T4362547-238
8.10.3.2.3
SPI Controller Mode Switching Parameters (CLOCK PHASE = 1, SPICLK = output, SPISIMO = output, and SPISOMI = input) #GUID-F724BCC6-8F26-42C4-8723-451EDE9A36D3/T4362547-244 #GUID-F724BCC6-8F26-42C4-8723-451EDE9A36D3/T4362547-245 #GUID-F724BCC6-8F26-42C4-8723-451EDE9A36D3/T4362547-246
8.10.3.3
SPI Peripheral Mode I/O Timings
8.10.3.3.1
SPI Peripheral Mode Switching Parameters (SPICLK = input, SPISIMO = input, and SPISOMI = output) #GUID-1B5DE4C6-14B2-48EF-965D-3B03E1AE325B/T4362547-70 #GUID-1B5DE4C6-14B2-48EF-965D-3B03E1AE325B/T4362547-71 #GUID-1B5DE4C6-14B2-48EF-965D-3B03E1AE325B/T4362547-73
8.10.3.4
Typical Interface Protocol Diagram (Peripheral Mode)
8.10.4
LVDS Interface Configuration
8.10.4.1
LVDS Interface Timings
8.10.5
General-Purpose Input/Output
8.10.5.1
Switching Characteristics for Output Timing versus Load Capacitance (CL)
8.10.6
Controller Area Network Interface (DCAN)
8.10.6.1
Dynamic Characteristics for the DCANx TX and RX Pins
8.10.7
Controller Area Network - Flexible Data-rate (CAN-FD)
8.10.7.1
Dynamic Characteristics for the CANx TX and RX Pins
8.10.8
Serial Communication Interface (SCI)
8.10.8.1
SCI Timing Requirements
8.10.9
Inter-Integrated Circuit Interface (I2C)
8.10.9.1
I2C Timing Requirements #GUID-36963FBF-DA1A-4FF8-B71D-4A185830E708/T4362547-185
8.10.10
Quad Serial Peripheral Interface (QSPI)
8.10.10.1
QSPI Timing Conditions
8.10.10.2
Timing Requirements for QSPI Input (Read) Timings #GUID-6DC69BBB-F187-4499-AC42-8C006552DEE1/T4362547-210 #GUID-6DC69BBB-F187-4499-AC42-8C006552DEE1/T4362547-209
8.10.10.3
QSPI Switching Characteristics
8.10.11
ETM Trace Interface
8.10.11.1
ETMTRACE Timing Conditions
8.10.11.2
ETM TRACE Switching Characteristics
8.10.12
Data Modification Module (DMM)
8.10.12.1
DMM Timing Requirements
8.10.13
JTAG Interface
8.10.13.1
JTAG Timing Conditions
8.10.13.2
Timing Requirements for IEEE 1149.1 JTAG
8.10.13.3
Switching Characteristics Over Recommended Operating Conditions for IEEE 1149.1 JTAG
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Subsystems
9.3.1
RF and Analog Subsystem
9.3.1.1
Clock Subsystem
9.3.1.2
Transmit Subsystem
9.3.1.3
Receive Subsystem
9.3.2
Processor Subsystem
9.3.3
Host Interface
9.3.4
Main Subsystem Cortex-R4F Memory Map
9.3.5
DSP Subsystem Memory Map
9.3.6
Hardware Accelerator
9.4
Other Subsystems
9.4.1
ADC Channels (Service) for User Application
9.4.1.1
GP-ADC Parameter
10
Monitoring and Diagnostics
10.1
Monitoring and Diagnostic Mechanisms
10.1.1
Error Signaling Module
11
Applications, Implementation, and Layout
11.1
Application Information
11.2
Reference Schematic
12
Device and Documentation Support
12.1
Device Nomenclature
12.2
Tools and Software
12.3
Documentation Support
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
13.1
Packaging Information
Package Options
Mechanical Data (Package|Pins)
ABL|161
MPBGAL4B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
swrs228a_oa
swrs228a_pm
1
Features
FMCW transceiver
Integrated PLL, transmitter, receiver, Baseband, and ADC
76- to 81-GHz coverage with 4 GHz available bandwidth
Four receive channels
Three transmit channels
Ultra-accurate chirp engine based on fractional-N PLL
TX power: 12 dBm
Built-in calibration and self-test
(monitoring)
Arm®
Cortex®
-R4F-based radio control system
Built-in firmware (ROM)
Self-calibrating system across process and temperature
C674x DSP for FMCW signal processing
On-chip Memory: 2MB
Cortex-R4F microcontroller for object tracking and classification, and interface control
Supports autonomous mode (loading user application from QSPI flash memory)
Integrated peripherals
Internal memories With ECC
Host interface
CAN and CAN-FD
Other interfaces available to user application
Up to 6 ADC channels
Up to 2 SPI channels
Up to 2 UARTs
I
2
C
GPIOs
2-lane LVDS interface for raw ADC data and debug instrumentation
Functional Safety-Compliant
Developed for functional safety applications
Documentation available to aid IEC 61508 functional safety system design up to SIL 3
Hardware integrity up to SIL-2
Safety-related certification
IEC 61508 certified upto SIL 2 by TUV SUD
Device advanced features
Embedded self-monitoring with no host processor involvement
Complex baseband architecture
Embedded interference detection capability
Programmable phase rotators in transmit path to enable beam forming
Power management
Built-in LDO network for enhanced PSRR
I/Os support dual voltage 3.3 V/1.8 V
Clock source
Supports external oscillator at 40 MHz
Supports externally driven clock (square/sine) at 40 MHz
Supports 40 MHz crystal connection with load capacitors
Easy hardware design
0.65-mm pitch, 161-pin 10.4 mm × 10.4 mm flip chip BGA package for easy assembly and low-cost PCB design
Small solution size
Operating conditions
Junction temp range: –40°C to 105°C