SLVSBC7E October   2013  – September 2018 LMZ31530

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Efficiency
  3. 3 Description
    1.     Simplified Application
  4. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Package Specifications
    5. 4.5 Electrical Characteristics
  5. 5 Device Information
    1.     Pin Functions
    2. 5.1 Functional Block Diagram
  6. 6 Typical Characteristics (PVIN = VIN = 12 V)
  7. 7 Typical Characteristics (PVIN = VIN = 5 V)
  8. 8 Application Information
    1. 8.1  Adjusting the Output Voltage
    2. 8.2  Frequency Select
    3. 8.3  Capacitor Recommendations for the LMZ31530 Power Supply
      1. 8.3.1 Capacitor Technologies
        1. 8.3.1.1 Electrolytic, Polymer-Electrolytic Capacitors
        2. 8.3.1.2 Ceramic Capacitors
        3. 8.3.1.3 Tantalum, Polymer-Tantalum Capacitors
      2. 8.3.2 Input Capacitor
      3. 8.3.3 Output Capacitor
    4. 8.4  Transient Response
    5. 8.5  Application Curves
    6. 8.6  Application Schematics
    7. 8.7  Custom Design With WEBENCH® Tools
    8. 8.8  VIN and PVIN Input Voltage
    9. 8.9  3.3 V PVIN Operation
    10. 8.10 Power Good (PWRGD)
    11. 8.11 Slow Start (SS_SEL)
    12. 8.12 Auto-Skip Eco-mode / Forced Continuous Conduction Mode
    13. 8.13 Power-Up Characteristics
    14. 8.14 Pre-Biased Start-Up
    15. 8.15 Remote Sense
    16. 8.16 Output On/Off Inhibit (INH)
    17. 8.17 Overcurrent Protection
    18. 8.18 Current Limit (ILIM) Adjust
    19. 8.19 Thermal Shutdown
    20. 8.20 Layout Considerations
    21. 8.21 EMI
  9. 9 Revision History
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RLG|72
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4.5 Electrical Characteristics

TA = -40°C to 85°C, PVIN = VIN = 12 V, VOUT = 1.8 V, IOUT = 30 A
CIN = 2 × 22 µF ceramic and 330 µF bulk, COUT = 4 × 100 µF ceramic (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOUT Output current 0 30 A
VIN Input bias voltage range Over IOUT range 4.5 14.5 V
PVIN Input switching voltage range Over IOUT range 3(2) 14.5 V
UVLO VIN Undervoltage lockout VIN Increasing 4.0 4.2 4.33 V
Hysteresis 0.25
VOUT(adj) Output voltage adjust range Over IOUT range 0.6 3.6 V
VOUT Set-point voltage tolerance ±1.0% (1)
Temperature variation -40°C ≤ TA ≤ +85°C ±0.25%
Load regulation Over IOUT range +0.4%
Total output voltage variation Includes set-point, load, and temperature variation ±2.0% (1)
Line regulation PVIN ±10% ±0.1%
Over PVIN range ±0.7%
η Efficiency PVIN = VIN = 12 V
IO = 15 A  		 VOUT = 3.3 V, fSW = 500kHz 94 %
VOUT = 1.8 V, fSW = 500kHz 92
VOUT = 1.2 V, fSW = 500kHz 88
VOUT = 0.9 V, fSW = 500kHz 86
VOUT = 0.6 V, fSW = 500kHz 82
PVIN = VIN = 5 V
IO = 15 A  		 VOUT = 3.3 V, fSW = 500kHz 96 %
VOUT = 1.8 V, fSW = 500kHz 94
VOUT = 1.2 V, fSW = 500kHz 91
VOUT = 0.9 V, fSW = 500kHz 88
VOUT = 0.6 V, fSW = 500kHz 85
Output voltage ripple 20 MHz bandwith 1% VOUT
ILIM Current limit threshold 40 A
Transient response 2.5 A/µs load step from 25 to 75% IOUT(max)  Recovery time 30 µs
VOUT over/undershoot 30 mV
VINH Inhibit Control Inhibit High Voltage 1.8 Open(3) V
Inhibit Low Voltage -0.3 0.6 V
IIN(stby) VIN standby current INH pin to AGND VIN = 5 V 0.5 0.7 mA
VIN = 12 V 1.2 1.5 mA
Power Good PWRGD Thresholds VOUT rising Good 95 %
Fault 115
VOUT falling Fault 90
Good 110
PWRGD Low Voltage I(PWRGD) = 2 mA 0.2 0.3 V
fSW Switching frequency FREQ_SEL pin OPEN, IOUT = 10 A 470 520 570 kHz
fSEL Frequency Select(4) 66 kΩ resistor between FREQ_SEL pin and PGND 300 kHz
FREQ_SEL pin connected to V5V (pin 61) 850 kHz
Thermal Shutdown Thermal shutdown 145 °C
Thermal shutdown hysteresis 10 °C
CIN External input capacitance Ceramic 44 (5) 94 µF
Non-ceramic 330
COUT External output capacitance 100 (6) 400 5000 µF
(1) The stated limit of the set-point voltage tolerance includes the tolerance of both the internal voltage reference and the internal adjustment resistor. The overall output voltage tolerance will be affected by the tolerance of the external RSET resistor.
(2) The minimum PVIN voltage is 3.0V or (VOUT+ 1.1V), whichever is greater. See VIN and PVIN Input Voltage for more details.
(3) This pin has an internal pull-up. If this pin is left open circuit, the device operates when a valid input voltage is applied. A small, low-leakage (<300nA) MOSFET is recommended for control.
(4) See the Frequency Select section for more information on selecting the frequency.
(5) A minimum of 44 µF (2x 22 µF) of external ceramic capacitance is required across the input (PVIN/VIN and PGND connected) for proper operation. Locate the capacitor close to the device. See Table 3 for more details. When operating with split VIN and PVIN rails, place 4.7 µF of ceramic capacitance directly at the VIN pin to PGND.
(6) A minimum of 100 µF of ceramic capacitance is required at the output. Locate the capacitance close to the device. Adding additional capacitance close to the load improves the response of the regulator to load transients and reduces ripple. See Table 3 for more details.