SBOS701D December   2015  – August 2021 OPA191 , OPA2191 , OPA4191

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA191
    5. 6.5 Thermal Information: OPA2191
    6. 6.6 Thermal Information: OPA4191
    7. 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
    8. 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Input Offset Voltage Drift
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Protection Circuitry
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Phase Reversal Protection
      4. 8.3.4 Thermal Protection
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 Common-Mode Voltage Range
      7. 8.3.7 Electrical Overstress
      8. 8.3.8 Overload Recovery
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-side Current Measurement
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 16-Bit Precision Multiplexed Data-Acquisition System
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Slew Rate Limit for Input Protection
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI™ SImulation Software (Free Download)
        2. 12.1.1.2 TI Precision Designs
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Offset Voltage Drift

The OPAx191 family of operational amplifiers is manufactured using TI’s e-trim operation amplifier technology. This e-trim operational amplifier technology is a TI proprietary method of trimming internal device parameters during either wafer probing or final testing. Each amplifier input offset voltage and input offset voltage drift is trimmed in production, thereby minimizing errors associated with input offset voltage and input offset voltage drift. When trimming input offset voltage drift, the systematic or linear drift error on each device is trimmed to zero. Figure 7-1 illustrates this concept.

GUID-F857C83C-2625-4481-883B-C8F160C3703D-low.gifFigure 7-1 Input Offset Before and After Drift Trim

A common method of specifying input offset voltage drift is the box method. The box method estimates a maximum input offset drift by bounding an offset voltage versus temperature curve with a box and using the corners of this bounding box to determine the drift. The slope of the line connecting the diagonal corners of the box corresponds to the input offset voltage drift. Figure 7-2 illustrates the box method concept. The box method works particularly well when the input offset drift is dominated by the linear component of drift, but because the OPA191 family uses TI’s e-trim operational amplifier technology to remove the linear component input offset voltage drift, the box method is not a particularly useful method of accurately performing an error analysis. Shown in Figure 7-2 are 30 typical units of OPAx191 with the box method superimposed for illustrative purposes. The boundaries of the box are determined by the specified temperature range along the x-axis and the maximum specified input offset voltage across that same temperature range along the y-axis. Using the box method predicts an input offset voltage drift of 0.9 µV/°C. As shown in Figure 7-2, the slopes of the actual input offset voltage versus temperature are much less than that predicted by the box method. The box method predicts a pessimistic value for the maximum input offset voltage drift and is not recommended when performing an error analysis.

GUID-190DC319-45E8-498F-B3C9-7BD7803CA2E7-low.gifFigure 7-2 The Box Method

Instead of the box method, a convenient way to illustrate input offset drift is to compute the slopes of the input offset voltage versus temperature curve. This is the same as computing the input offset drift at each point along the input offset voltage versus temperature curve. The results for the OPAx191 family are illustrated in Figure 7-3.

GUID-4614649D-9CD9-4B27-9824-05ED1A12260B-low.pngFigure 7-3 Input Offset Voltage Drift vs Temperature (SOIC Package)

As illustrated in Figure 7-3, the input offset drift is typically less than ±0.3 µV/°C over the range from –40°C to +125°C. When performing an error analysis over the full specified temperature range, use the typical and maximum values for input offset voltage drift as described in the Electrical Characteristics tables. If a reduced temperature range is applicable, use the information illustrated in Figure 7-3 when performing an error analysis. To determine the change in input offset voltage, use Equation 1:

Equation 1. ΔVOS = ΔT × dVOS/dT

where

  • ΔVOS = Change in input offset voltage
  • ΔT = Change in temperature
  • dVOS/dT = Input offset voltage drift

For example, determine the amount of OPA191ID input offset voltage change over the temperature range of 25°C to 75°C for 1 σ (68%) of the units. As shown in Figure 7-3, the input offset drift is typically 0.25 µV/°C. This input offset drift results in a typical input offset voltage change of (75°C – 25°C) × 0.25 µV/°C = 12.5 µV.

For 3 σ (99.7%) of the units, Figure 7-3 shows a typical input offset drift of approximately 0.75 µV/°C. This input offset drift results in a typical input offset voltage change of (75°C – 25°C) × 0.75 µV/°C = 37.5 µV.