SBOS637D October   2016  – June 2019 OPA2325 , OPA325 , OPA4325

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Offset Voltage vs Input Common-Mode Voltage
  3. 3 Description
    1.     The OPAx325 as an ADC Driver Amplifier
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: OPA325
    2.     Pin Functions: OPA2325
    3.     Pin Functions: OPA4325
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA325
    5. 6.5 Thermal Information: OPA2325
    6. 6.6 Thermal Information: OPA4325
    7. 6.7 Electrical Characteristics: VS = 2.2 V to 5.5 V or ±1.1 V to ±2.75 V
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Zero-Crossover Input Stage
      2. 7.3.2 Low Input Offset Voltage
      3. 7.3.3 Input and ESD Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Operating Characteristics
      2. 8.1.2 Basic Amplifier Configurations
      3. 8.1.3 Driving an Analog-to-Digital Converter
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Typical Characteristics

at TA = 25°C, VCM = VOUT = midsupply, and RL = 10 kΩ (unless otherwise noted)
OPA325 OPA2325 OPA4325 C002_SBOS637.png
Figure 1. Offset Voltage Production Distribution Histogram
OPA325 OPA2325 OPA4325 C003_SBOS637.png
Figure 3. Offset Voltage vs Common-Mode Voltage
OPA325 OPA2325 OPA4325 C200_SBOS637.png
CL = 15 pF
Figure 5. Open-Loop Gain and Phase vs Frequency
OPA325 OPA2325 OPA4325 C005_SBOS637.png
RL = 10 kΩ
Figure 7. Open-Loop Gain vs Temperature
OPA325 OPA2325 OPA4325 C007_SBOS637.png
Figure 9. Quiescent Current vs Temperature
OPA325 OPA2325 OPA4325 C013_SBOS637.png
Figure 11. Input Bias Current vs Common-Mode Voltage
OPA325 OPA2325 OPA4325 C016_SBOS637.png
Figure 13. Input Offset Current Distribution Histogram
OPA325 OPA2325 OPA4325 C009A_SBOS637.png
Figure 15. Output Voltage Swing (Positive) vs
Output Current
OPA325 OPA2325 OPA4325 C008_SBOS637.png
Figure 17. Short-Circuit Current vs Temperature
OPA325 OPA2325 OPA4325 C011_SBOS637.png
Figure 19. CMRR vs Temperature
OPA325 OPA2325 OPA4325 C205_SBOS637.png
Figure 21. Input Voltage Noise Spectral Density vs Frequency
OPA325 OPA2325 OPA4325 C201_SBOS637.png
VS = 1.8 V, RL = 10 kΩ, CL = 15 pF
Figure 23. Closed-Loop Gain vs Frequency
OPA325 OPA2325 OPA4325 C218_SBOS637.png
Figure 25. Maximum Output Voltage vs Frequency
OPA325 OPA2325 OPA4325 C209_SBOS637.png
Figure 27. Small-Signal Overshoot vs Load Capacitance
OPA325 OPA2325 OPA4325 C206_SBOS637.png
VIN = 2 VPP, VS = ±2.5 V, filter bandwidth = 500 kHz
Figure 29. THD+N vs Frequency
OPA325 OPA2325 OPA4325 C210_SBOS637.png
Figure 31. No Phase Reversal
OPA325 OPA2325 OPA4325 C211_SBOS637.png
Figure 33. Negative Overload Recovery
OPA325 OPA2325 OPA4325 C213_SBOS701.png
VIN = 10 mVPP, G = +1, CL = 15 pF
Figure 35. Small-Signal Step Response
OPA325 OPA2325 OPA4325 C216_SBOS637.png
VIN = 2-V step
Figure 37. 0.01% Negative Settling Time
OPA325 OPA2325 OPA4325 C214_SBOS637.png
VIN = 4 VPP, G = –1, CL = 15 pF
Figure 39. Large-Signal Step Response
OPA325 OPA2325 OPA4325 C001_SBOS637.png
Figure 2. Offset Voltage Drift Distribution Histogram
OPA325 OPA2325 OPA4325 C010_SBOS637.png
Figure 4. Offset Voltage vs Temperature
OPA325 OPA2325 OPA4325 C017_SBOS637.png
Figure 6. Offset Voltage vs Supply Voltage
OPA325 OPA2325 OPA4325 C006_SBOS637.png
RL = 2 kΩ
Figure 8. Open-Loop Gain vs Temperature
OPA325 OPA2325 OPA4325 C004_SBOS637.png
Figure 10. Quiescent Current vs Supply Voltage
OPA325 OPA2325 OPA4325 C015_SBOS637.png
Figure 12. Input Bias Current Distribution Histogram
OPA325 OPA2325 OPA4325 C014_SBOS637.png
Figure 14. Input Bias Current vs Temperature
OPA325 OPA2325 OPA4325 C009B_SBOS637.png
Figure 16. Output Voltage Swing (Negative) vs
Output Current
OPA325 OPA2325 OPA4325 C203_SBOS637.png
Figure 18. CMRR and PSRR vs Frequency
OPA325 OPA2325 OPA4325 C012_SBOS637.png
Figure 20. PSRR vs Temperature
OPA325 OPA2325 OPA4325 C204_SBOS637.png
Figure 22. 0.1-Hz to 10-Hz Input Voltage Noise
OPA325 OPA2325 OPA4325 C202_SBOS637.png
VS = 5.5 V, RL = 10 kΩ, CL = 15 pF
Figure 24. Closed-Loop Gain vs Frequency
OPA325 OPA2325 OPA4325 C025_SBOS637.png
Figure 26. Open-Loop Output Impedance vs Frequency
OPA325 OPA2325 OPA4325 C208_SBOS637.png
f = 10 kHz, VS = ±2.5 V, filter bandwidth = 500 kHz
Figure 28. THD+N vs Amplitude
OPA325 OPA2325 OPA4325 C207_SBOS701.png
VIN = 4 VPP, VS = ±2.5 V, filter bandwidth = 500 kHz
Figure 30. THD+N vs Frequency
OPA325 OPA2325 OPA4325 C212_SBOS637.png
Figure 32. Positive Overload Recovery
OPA325 OPA2325 OPA4325 C219_SBOS637.png
CL = 15 pF
Figure 34. Slew Rate vs Supply Voltage
OPA325 OPA2325 OPA4325 C217_SBOS637.png
VIN = 2-V step
Figure 36. 0.01% Positive Settling Time
OPA325 OPA2325 OPA4325 C215_SBOS637.png
VIN = 4 VPP, G = +1, CL = 15 pF
Figure 38. Large-Signal Step Response