SBVS032J March   2002  – July 2025 REF30 , REF30E

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 REF30E
    6. 6.6 REF30
    7. 6.7 Typical Characteristics REF30E
    8. 6.8 Typical Characteristics REF30
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Voltage
      2. 7.3.2 Thermal Hysteresis
      3. 7.3.3 Temperature Drift
      4. 7.3.4 Noise Performance
      5. 7.3.5 Long-Term Stability
      6. 7.3.6 Load Regulation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Negative Reference Voltage
      2. 7.4.2 Data Acquisition
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Design Requirements

  • Supply Voltage: 3.3V
  • Maximum Input Voltage: ±6V
  • Specified Input Voltage: ±5V
  • ADC Reference Voltage: 1.25V

The goal for this design is to accurately condition a ±5V bipolar input voltage into a voltage that works for conversion by a low-voltage ADC with a 1.25V reference voltage, VREF, and an input voltage range of VREF/2. The circuit can function with reduced performance over a wider input range of at least ±6V to allow for easier protection of overvoltage conditions.