SBOS932C January 2020 – March 2021 THP210
The power-down feature on the THP210 puts the device into a low power-consumption state, with quiescent current minimized. To force the device into the low-power state, drive the PD pin lower than the power-down threshold voltage (VVS+ – 2 V). Driving the PD pin lower than the power-down threshold voltage forces the internal logic to disable both the differential and common-mode amplifiers. The PD pin has an internal pullup current that allows the pin to be used in an open-drain MOSFET configuration without an additional pullup resistor, as seen in Figure 9-7. In this configuration, the logic level can be referenced to the MOSFET, and the voltage at the PD pin is level-shifted to account for use with high supply voltages. Be sure to select an N-type MOSFET with a maximum BVDSS greater than the total supply voltage.
For applications that do not use the power-down feature, tie the PD pin to the positive supply voltage.
When PD is low (device is in power down) the output pins is in a high-impedance state.